NAP mode on powerpc 970

Benjamin Herrenschmidt benh at kernel.crashing.org
Sat Jan 17 13:02:27 EST 2004


On Sat, 2004-01-17 at 05:01, Jake Moilanen wrote:
> > I was not able to find anything related to the NAP mode in the ppc64
> > branch.
>
> Linux does not support NAP mode for the 970's.  Going to this mode
> powers off the caches (thus killing the caches).  There are some other
> potential issues (thermal, and power supply).
>
> This should not be done in Linux in the first place.  The correct place
> is in the FW.

No, no ... I do it on the G5 without problem :)

The north bridge will get the CPU out of NAP mode for snooping, the
cache aren't powered off.

I will get the patch doing that to ameslab 2.6 soon, when I start
getting the G5 bits in.

> > Is there somebody who try to patch the idle loop of the ppc64 branch as
> > it is already done in the ppc32 branch for some ppc processors ?
> >
> > The other related issue I have is how to enable the NAP mode by setting
> > the hypervisor HID0 register. Is there a way to write the hypervisor
> > register through the kernel ? through the firmware of the JS20 ?
>
> Yes, bit 9 on HID0 needs to be set then the POW bit in the MSR (bit
> 45).  This will quiesce the processor and prefetch engine and put you
> into doze mode.  The buses will get the quiesced next and once they are
> you will be in NAP mode.  Any interrupt will kick you back to full-power
> mode.
>
> HID0 is a hypervisor resource and linux does not have access to it.
>
> There is more information in book 4 of the 970.

Then HV could do it as well... Actually, on the js20, it could just
leave HID0:NAP set permanently and let the kernel use MSR:POW from
its idle loop...

Ben.


** Sent via the linuxppc64-dev mail list. See http://lists.linuxppc.org/





More information about the Linuxppc64-dev mailing list