[PATCH] -mminimal-toc removal 1: Cleanups
Anton Blanchard
anton at samba.org
Tue Aug 24 23:16:46 EST 2004
- Get rid of a number of . symbols that arent required. No one likes
. symbols
- Remove a number of unnecessary .globl definitions
- Remove _STATIC(), we dont need procedure descriptors for static
functions in assembly files.
Signed-off-by: Anton Blanchard <anton at samba.org>
---
mminimal_toc_die_die_die-anton/arch/ppc64/kernel/entry.S | 8
mminimal_toc_die_die_die-anton/arch/ppc64/kernel/head.S | 141 ++++-------
mminimal_toc_die_die_die-anton/include/asm-ppc64/processor.h | 12
3 files changed, 63 insertions(+), 98 deletions(-)
diff -puN arch/ppc64/kernel/entry.S~mminimal_toc_die_die_die_1 arch/ppc64/kernel/entry.S
--- mminimal_toc_die_die_die/arch/ppc64/kernel/entry.S~mminimal_toc_die_die_die_1 2004-08-24 18:55:08.014058241 +1000
+++ mminimal_toc_die_die_die-anton/arch/ppc64/kernel/entry.S 2004-08-24 19:23:05.896257693 +1000
@@ -661,7 +661,7 @@ _GLOBAL(enter_rtas)
std r6,PACASAVEDMSR(r13)
/* Setup our real return addr */
- SET_REG_TO_LABEL(r4,.rtas_return_loc)
+ SET_REG_TO_LABEL(r4,rtas_return_loc)
SET_REG_TO_CONST(r9,KERNELBASE)
sub r4,r4,r9
mtlr r4
@@ -687,7 +687,7 @@ _GLOBAL(enter_rtas)
rfid
b . /* prevent speculative execution */
-_STATIC(rtas_return_loc)
+rtas_return_loc:
/* relocation is off at this point */
mfspr r4,SPRG3 /* Get PACA */
SET_REG_TO_CONST(r5, KERNELBASE)
@@ -700,7 +700,7 @@ _STATIC(rtas_return_loc)
mtmsrd r6
ld r1,PACAR1(r4) /* Restore our SP */
- LOADADDR(r3,.rtas_restore_regs)
+ LOADADDR(r3,rtas_restore_regs)
ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
mtspr SRR0,r3
@@ -708,7 +708,7 @@ _STATIC(rtas_return_loc)
rfid
b . /* prevent speculative execution */
-_STATIC(rtas_restore_regs)
+rtas_restore_regs:
/* relocation is on at this point */
REST_GPR(2, r1) /* Restore the TOC */
REST_GPR(13, r1) /* Restore paca */
diff -puN arch/ppc64/kernel/head.S~mminimal_toc_die_die_die_1 arch/ppc64/kernel/head.S
--- mminimal_toc_die_die_die/arch/ppc64/kernel/head.S~mminimal_toc_die_die_die_1 2004-08-24 18:55:08.021057703 +1000
+++ mminimal_toc_die_die_die-anton/arch/ppc64/kernel/head.S 2004-08-24 19:32:30.672607890 +1000
@@ -84,10 +84,10 @@
.globl _stext
_stext:
#ifdef CONFIG_PPC_PSERIES
-_STATIC(__start)
+__start:
/* NOP this out unconditionally */
BEGIN_FTR_SECTION
- b .__start_initialization_pSeries
+ b __start_initialization_pSeries
END_FTR_SECTION(0, 1)
#endif
/* Catch branch to 0 in real mode */
@@ -158,7 +158,7 @@ _GLOBAL(__secondary_hold)
bne 100b
#ifdef CONFIG_HMT
- b .hmt_init
+ b hmt_init
#else
#ifdef CONFIG_SMP
mr r3,r24
@@ -301,7 +301,6 @@ exception_marker:
*/
#define STD_EXCEPTION_PSERIES(n, label) \
. = n; \
- .globl label##_Pseries; \
label##_Pseries: \
HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \
@@ -383,7 +382,6 @@ label##_Iseries_profile: \
#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
.align 7; \
- .globl label##_common; \
label##_common: \
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
DISABLE_INTS; \
@@ -394,7 +392,6 @@ label##_common: \
#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
.align 7; \
- .globl label##_common; \
label##_common: \
EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
DISABLE_INTS; \
@@ -406,19 +403,17 @@ label##_common: \
* Start of pSeries system interrupt routines
*/
. = 0x100
- .globl __start_interrupts
__start_interrupts:
STD_EXCEPTION_PSERIES(0x100, SystemReset)
. = 0x200
-_MachineCheckPseries:
+MachineCheck_Pseries:
HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, MachineCheck_common)
. = 0x300
- .globl DataAccess_Pseries
DataAccess_Pseries:
HMT_MEDIUM
mtspr SPRG1,r13
@@ -430,14 +425,13 @@ BEGIN_FTR_SECTION
rlwimi r13,r12,16,0x20
mfcr r12
cmpwi r13,0x2c
- beq .do_stab_bolted_Pseries
+ beq do_stab_bolted_Pseries
mtcrf 0x80,r12
mfspr r12,SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, DataAccess_common)
. = 0x380
- .globl DataAccessSLB_Pseries
DataAccessSLB_Pseries:
HMT_MEDIUM
mtspr SPRG1,r13
@@ -453,7 +447,7 @@ DataAccessSLB_Pseries:
clrrdi r12,r13,32 /* get high part of &label */
mfmsr r10
mfspr r11,SRR0 /* save SRR0 */
- ori r12,r12,(.do_slb_miss)@l
+ ori r12,r12,(do_slb_miss)@l
ori r10,r10,MSR_IR|MSR_DR /* DON'T set RI for SLB miss */
mtspr SRR0,r12
mfspr r12,SRR1 /* and SRR1 */
@@ -465,7 +459,6 @@ DataAccessSLB_Pseries:
STD_EXCEPTION_PSERIES(0x400, InstructionAccess)
. = 0x480
- .globl InstructionAccessSLB_Pseries
InstructionAccessSLB_Pseries:
HMT_MEDIUM
mtspr SPRG1,r13
@@ -481,7 +474,7 @@ InstructionAccessSLB_Pseries:
clrrdi r12,r13,32 /* get high part of &label */
mfmsr r10
mfspr r11,SRR0 /* save SRR0 */
- ori r12,r12,(.do_slb_miss)@l
+ ori r12,r12,(do_slb_miss)@l
ori r10,r10,MSR_IR|MSR_DR /* DON'T set RI for SLB miss */
mtspr SRR0,r12
mfspr r12,SRR1 /* and SRR1 */
@@ -499,7 +492,6 @@ InstructionAccessSLB_Pseries:
STD_EXCEPTION_PSERIES(0xb00, Trap_0b)
. = 0xc00
- .globl SystemCall_Pseries
SystemCall_Pseries:
HMT_MEDIUM
mr r9,r13
@@ -536,10 +528,10 @@ SystemCall_Pseries:
STD_EXCEPTION_PSERIES(0x3000, PerformanceMonitor)
. = 0x3100
-_GLOBAL(do_stab_bolted_Pseries)
+do_stab_bolted_Pseries:
mtcrf 0x80,r12
mfspr r12,SPRG2
- EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
+ EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, do_stab_bolted)
/* Space for the naca. Architected to be located at real address
@@ -548,8 +540,6 @@ _GLOBAL(do_stab_bolted_Pseries)
* point to itVpdAreas. On pSeries native, this value is not used.
*/
. = NACA_PHYS_ADDR
- .globl __end_interrupts
- .globl __start_naca
__end_interrupts:
__start_naca:
#ifdef CONFIG_PPC_ISERIES
@@ -562,12 +552,9 @@ __start_naca:
.llong paca
. = SYSTEMCFG_PHYS_ADDR
- .globl __end_naca
- .globl __start_systemcfg
__end_naca:
__start_systemcfg:
. = (SYSTEMCFG_PHYS_ADDR + PAGE_SIZE)
- .globl __end_systemcfg
__end_systemcfg:
#ifdef CONFIG_PPC_ISERIES
@@ -615,7 +602,7 @@ BEGIN_FTR_SECTION
rlwimi r13,r12,16,0x20
mfcr r12
cmpwi r13,0x2c
- beq .do_stab_bolted_Iseries
+ beq do_stab_bolted_Iseries
mtcrf 0x80,r12
mfspr r12,SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
@@ -623,14 +610,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_ISERIES_2
b DataAccess_common
-.do_stab_bolted_Iseries:
+do_stab_bolted_Iseries:
mtcrf 0x80,r12
mfspr r12,SPRG2
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
EXCEPTION_PROLOG_ISERIES_2
- b .do_stab_bolted
+ b do_stab_bolted
- .globl DataAccessSLB_Iseries
+ .globl DataAccessSLB_Iseries
DataAccessSLB_Iseries:
mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
@@ -638,11 +625,11 @@ DataAccessSLB_Iseries:
ld r11,PACALPPACA+LPPACASRR0(r13)
ld r12,PACALPPACA+LPPACASRR1(r13)
mfspr r3,DAR
- b .do_slb_miss
+ b do_slb_miss
STD_EXCEPTION_ISERIES(0x400, InstructionAccess, PACA_EXGEN)
- .globl InstructionAccessSLB_Iseries
+ .globl InstructionAccessSLB_Iseries
InstructionAccessSLB_Iseries:
mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
@@ -650,7 +637,7 @@ InstructionAccessSLB_Iseries:
ld r11,PACALPPACA+LPPACASRR0(r13)
ld r12,PACALPPACA+LPPACASRR1(r13)
mr r3,r11
- b .do_slb_miss
+ b do_slb_miss
MASKABLE_EXCEPTION_ISERIES(0x500, HardwareInterrupt)
STD_EXCEPTION_ISERIES(0x600, Alignment, PACA_EXGEN)
@@ -660,7 +647,7 @@ InstructionAccessSLB_Iseries:
STD_EXCEPTION_ISERIES(0xa00, Trap_0a, PACA_EXGEN)
STD_EXCEPTION_ISERIES(0xb00, Trap_0b, PACA_EXGEN)
- .globl SystemCall_Iseries
+ .globl SystemCall_Iseries
SystemCall_Iseries:
mr r9,r13
mfspr r13,SPRG3
@@ -722,7 +709,6 @@ iseries_secondary_smp_loop:
b 1b /* If SMP not configured, secondaries
* loop forever */
- .globl Decrementer_Iseries_masked
Decrementer_Iseries_masked:
li r11,1
stb r11,PACALPPACA+LPPACADECRINT(r13)
@@ -730,7 +716,6 @@ Decrementer_Iseries_masked:
mtspr SPRN_DEC,r12
/* fall through */
- .globl HardwareInterrupt_Iseries_masked
HardwareInterrupt_Iseries_masked:
mtcrf 0x80,r9 /* Restore regs */
ld r11,PACALPPACA+LPPACASRR0(r13)
@@ -750,7 +735,6 @@ HardwareInterrupt_Iseries_masked:
* Data area reserved for FWNMI option.
*/
.= 0x7000
- .globl fwnmi_data_area
fwnmi_data_area:
/*
@@ -774,11 +758,9 @@ MachineCheck_FWNMI:
* before we get control (with relocate on)
*/
. = STAB0_PHYS_ADDR
- .globl __start_stab
__start_stab:
. = (STAB0_PHYS_ADDR + PAGE_SIZE)
- .globl __end_stab
__end_stab:
@@ -791,7 +773,6 @@ __end_stab:
* save area: PACA_EXMC instead of PACA_EXGEN.
*/
.align 7
- .globl MachineCheck_common
MachineCheck_common:
EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
DISABLE_INTS
@@ -900,7 +881,6 @@ unrecov_fer:
* r9 - r13 are saved in paca->exgen.
*/
.align 7
- .globl DataAccess_common
DataAccess_common:
mfspr r10,DAR
std r10,PACA_EXGEN+EX_DAR(r13)
@@ -910,19 +890,17 @@ DataAccess_common:
ld r3,PACA_EXGEN+EX_DAR(r13)
lwz r4,PACA_EXGEN+EX_DSISR(r13)
li r5,0x300
- b .do_hash_page /* Try to handle as hpte fault */
+ b do_hash_page /* Try to handle as hpte fault */
.align 7
- .globl InstructionAccess_common
InstructionAccess_common:
EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
ld r3,_NIP(r1)
andis. r4,r12,0x5820
li r5,0x400
- b .do_hash_page /* Try to handle as hpte fault */
+ b do_hash_page /* Try to handle as hpte fault */
.align 7
- .globl HardwareInterrupt_common
.globl HardwareInterrupt_entry
HardwareInterrupt_common:
EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
@@ -933,7 +911,6 @@ HardwareInterrupt_entry:
b .ret_from_except_lite
.align 7
- .globl Alignment_common
Alignment_common:
mfspr r10,DAR
std r10,PACA_EXGEN+EX_DAR(r13)
@@ -951,7 +928,6 @@ Alignment_common:
b .ret_from_except
.align 7
- .globl ProgramCheck_common
ProgramCheck_common:
EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
bl .save_nvgprs
@@ -961,10 +937,9 @@ ProgramCheck_common:
b .ret_from_except
.align 7
- .globl FPUnavailable_common
FPUnavailable_common:
EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
- bne .load_up_fpu /* if from user, just load it up */
+ bne load_up_fpu /* if from user, just load it up */
bl .save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
ENABLE_INTS
@@ -972,11 +947,10 @@ FPUnavailable_common:
BUG_OPCODE
.align 7
- .globl AltivecUnavailable_common
AltivecUnavailable_common:
EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
#ifdef CONFIG_ALTIVEC
- bne .load_up_altivec /* if from user, just load it up */
+ bne load_up_altivec /* if from user, just load it up */
#endif
bl .save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
@@ -988,15 +962,15 @@ AltivecUnavailable_common:
* Hash table stuff
*/
.align 7
-_GLOBAL(do_hash_page)
+do_hash_page:
std r3,_DAR(r1)
std r4,_DSISR(r1)
andis. r0,r4,0xa450 /* weird error? */
- bne- .handle_page_fault /* if not, try to insert a HPTE */
+ bne- handle_page_fault /* if not, try to insert a HPTE */
BEGIN_FTR_SECTION
andis. r0,r4,0x0020 /* Is it a segment table fault? */
- bne- .do_ste_alloc /* If so handle it */
+ bne- do_ste_alloc /* If so handle it */
END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
/*
@@ -1051,7 +1025,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
#endif
/* Here we have a page fault that hash_page can't handle. */
-_GLOBAL(handle_page_fault)
+handle_page_fault:
ENABLE_INTS
11: ld r4,_DAR(r1)
ld r5,_DSISR(r1)
@@ -1067,11 +1041,11 @@ _GLOBAL(handle_page_fault)
b .ret_from_except
/* here we have a segment miss */
-_GLOBAL(do_ste_alloc)
+do_ste_alloc:
bl .ste_allocate /* try to insert stab entry */
cmpdi r3,0
beq+ fast_exception_return
- b .handle_page_fault
+ b handle_page_fault
/*
* r13 points to the PACA, r9 contains the saved CR,
@@ -1081,7 +1055,7 @@ _GLOBAL(do_ste_alloc)
* We assume (DAR >> 60) == 0xc.
*/
.align 7
-_GLOBAL(do_stab_bolted)
+do_stab_bolted:
stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
@@ -1176,7 +1150,7 @@ _GLOBAL(do_stab_bolted)
* r3 is saved in paca->slb_r3
* We assume we aren't going to take any exceptions during this procedure.
*/
-_GLOBAL(do_slb_miss)
+do_slb_miss:
mflr r10
stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
@@ -1228,7 +1202,7 @@ unrecov_slb:
*/
_GLOBAL(pseries_secondary_smp_init)
/* turn on 64-bit mode */
- bl .enable_64b_mode
+ bl enable_64b_mode
isync
/* Set up a paca value for this processor. */
@@ -1303,12 +1277,12 @@ _GLOBAL(__start_initialization_iSeries)
/* relocation is on at this point */
- b .start_here_common
+ b start_here_common
#endif
#ifdef CONFIG_PPC_PSERIES
-_STATIC(mmu_off)
+mmu_off:
mfmsr r3
andi. r0,r3,MSR_IR|MSR_DR
beqlr
@@ -1318,14 +1292,15 @@ _STATIC(mmu_off)
sync
rfid
b . /* prevent speculative execution */
-_GLOBAL(__start_initialization_pSeries)
+
+__start_initialization_pSeries:
mr r31,r3 /* save parameters */
mr r30,r4
mr r29,r5
mr r28,r6
mr r27,r7
- bl .enable_64b_mode
+ bl enable_64b_mode
/* put a relocation offset into r3 */
bl .reloc_offset
@@ -1354,15 +1329,15 @@ _GLOBAL(__start_initialization_pSeries)
li r24,0 /* cpu # */
/* Switch off MMU if not already */
- LOADADDR(r4, .__after_prom_start - KERNELBASE)
+ LOADADDR(r4, after_prom_start - KERNELBASE)
add r4,r4,r23
- bl .mmu_off
+ bl mmu_off
/*
* At this point, r3 contains the physical address we are running at,
* returned by prom_init()
*/
-_STATIC(__after_prom_start)
+after_prom_start:
/*
* We need to run with __start at physical address 0.
@@ -1407,7 +1382,7 @@ _STATIC(__after_prom_start)
ld r5,0(r5) /* get the value of klimit */
sub r5,r5,r27
bl .copy_and_flush /* copy the rest */
- b .start_here_pSeries
+ b start_here_pSeries
#endif
/*
@@ -1457,7 +1432,7 @@ copy_to_here:
* switch (ie, no lazy save of the FP registers).
* On entry: r13 == 'current' && last_task_used_math != 'current'
*/
-_STATIC(load_up_fpu)
+load_up_fpu:
mfmsr r5 /* grab the current MSR */
ori r5,r5,MSR_FP
mtmsrd r5 /* enable use of fpu now */
@@ -1560,7 +1535,7 @@ _GLOBAL(giveup_fpu)
* switch (ie, no lazy save of the vector registers).
* On entry: r13 == 'current' && last_task_used_altivec != 'current'
*/
-_STATIC(load_up_altivec)
+load_up_altivec:
mfmsr r5 /* grab the current MSR */
oris r5,r5,MSR_VEC at h
mtmsrd r5 /* enable use of VMX now */
@@ -1681,21 +1656,21 @@ _GLOBAL(giveup_altivec)
.globl pmac_secondary_start_1
pmac_secondary_start_1:
li r24, 1
- b .pmac_secondary_start
+ b pmac_secondary_start
.globl pmac_secondary_start_2
pmac_secondary_start_2:
li r24, 2
- b .pmac_secondary_start
+ b pmac_secondary_start
.globl pmac_secondary_start_3
pmac_secondary_start_3:
li r24, 3
- b .pmac_secondary_start
+ b pmac_secondary_start
-_GLOBAL(pmac_secondary_start)
+pmac_secondary_start:
/* turn on 64-bit mode */
- bl .enable_64b_mode
+ bl enable_64b_mode
isync
/* Copy some CPU settings from CPU 0 */
@@ -1792,7 +1767,7 @@ _GLOBAL(__secondary_start)
mtlr r7
/* enable MMU and jump to start_secondary */
- LOADADDR(r3,.start_secondary_prolog)
+ LOADADDR(r3,start_secondary_prolog)
SET_REG_TO_CONST(r4, MSR_KERNEL)
#ifdef DO_SOFT_DISABLE
ori r4,r4,MSR_EE
@@ -1806,7 +1781,8 @@ _GLOBAL(__secondary_start)
* Running with relocation on at this point. All we want to do is
* zero the stack back-chain pointer before going into C code.
*/
-_GLOBAL(start_secondary_prolog)
+ .global start_secondary_prolog
+start_secondary_prolog:
li r3,0
std r3,0(r1) /* Zero the stack frame pointer */
bl .start_secondary
@@ -1815,7 +1791,7 @@ _GLOBAL(start_secondary_prolog)
/*
* This subroutine clobbers r11 and r12
*/
-_GLOBAL(enable_64b_mode)
+enable_64b_mode:
mfmsr r11 /* grab the current MSR */
li r12,1
rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
@@ -1831,7 +1807,7 @@ _GLOBAL(enable_64b_mode)
/*
* This is where the main kernel code starts.
*/
-_STATIC(start_here_pSeries)
+start_here_pSeries:
/* get a new offset, now that the kernel has moved. */
bl .reloc_offset
mr r26,r3
@@ -1864,7 +1840,7 @@ _STATIC(start_here_pSeries)
beq 90f
b 91f /* HMT not supported */
90: li r3,0
- bl .hmt_start_secondary
+ bl hmt_start_secondary
91:
#endif
@@ -1895,7 +1871,7 @@ _STATIC(start_here_pSeries)
li r0,0
stdu r0,-STACK_FRAME_OVERHEAD(r1)
- /* set up the TOC (physical address) */
+ /* set up the TOC (physical address) */
LOADADDR(r2,__toc_start)
addi r2,r2,0x4000
addi r2,r2,0x4000
@@ -1959,7 +1935,7 @@ _STATIC(start_here_pSeries)
ld r6,0(r6) /* get the value of _SDR1 */
mtspr SDR1,r6 /* set the htab location */
98:
- LOADADDR(r3,.start_here_common)
+ LOADADDR(r3,start_here_common)
SET_REG_TO_CONST(r4, MSR_KERNEL)
mtspr SRR0,r3
mtspr SRR1,r4
@@ -1968,7 +1944,7 @@ _STATIC(start_here_pSeries)
#endif /* CONFIG_PPC_PSERIES */
/* This is where all platforms converge execution */
-_STATIC(start_here_common)
+start_here_common:
/* relocation is on at this point */
/* The following code sets up the SP and TOC now that we are */
@@ -2037,7 +2013,8 @@ _STATIC(start_here_common)
_GLOBAL(__setup_cpu_power3)
blr
-_GLOBAL(hmt_init)
+ .global hmt_init
+hmt_init:
#ifdef CONFIG_HMT
LOADADDR(r5, hmt_thread_data)
mfspr r7,PVR
@@ -2056,7 +2033,7 @@ _GLOBAL(hmt_init)
andi. r6,r6,0x3ff
92: sldi r4,r24,3
stwx r6,r5,r4
- bl .hmt_start_secondary
+ bl hmt_start_secondary
b 101f
__hmt_secondary_hold:
@@ -2087,7 +2064,7 @@ __hmt_secondary_hold:
b .pseries_secondary_smp_init
#ifdef CONFIG_HMT
-_GLOBAL(hmt_start_secondary)
+hmt_start_secondary:
LOADADDR(r4,__hmt_secondary_hold)
clrldi r4,r4,4
mtspr NIADORM, r4
diff -puN include/asm-ppc64/processor.h~mminimal_toc_die_die_die_1 include/asm-ppc64/processor.h
--- mminimal_toc_die_die_die/include/asm-ppc64/processor.h~mminimal_toc_die_die_die_1 2004-08-24 19:34:49.849838193 +1000
+++ mminimal_toc_die_die_die-anton/include/asm-ppc64/processor.h 2004-08-24 19:34:58.122518472 +1000
@@ -426,18 +426,6 @@ name: \
.type GLUE(.,name), at function; \
GLUE(.,name):
-#define _STATIC(name) \
- .section ".text"; \
- .align 2 ; \
- .section ".opd","aw"; \
-name: \
- .quad GLUE(.,name); \
- .quad .TOC. at tocbase; \
- .quad 0; \
- .previous; \
- .type GLUE(.,name), at function; \
-GLUE(.,name):
-
#endif /* __ASSEMBLY__ */
_
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