[Linuxppc-users] hardware transactions on power9

Benjamin Herrenschmidt benh at au1.ibm.com
Tue Jul 10 07:29:38 AEST 2018


On Tue, 2018-07-10 at 07:25 +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2018-07-09 at 10:20 -0600, Steve Pittman wrote:
> > Peter,
> > 
> > At https://access.redhat.com/documentation/en-us/red_hat_enterprise_linux/7/html-single/7.5_release_notes/indexI see:
> > 
> >  Red Hat Enterprise Linux 7.5 is distributed with the kernel-alt packages, which include kernel version 4.14. This kernel version provides support for the following architectures:
> > 64-bit ARM
> > IBM POWER9 (little endian)
> > IBM z Systems
> > 
> > Are you running the 4.14 kernel from the kernal-alt packages?  If not, you do not have full RHEL 7.5 support for the POWER9 processor.
> 
> Ah you are running "PowerNV", which is native, with no hypervisor.
> 
> Due to POWER9 HW errata, we currently don't support HW Transactional
> Memory in that mode. We have some support to use TM in a VM but not
> bare metal.

Note: Before using such a feature, you should always first check for
its availability via "hwcap".

Look for the PPC_FEATURE2_HAS_HTM bit in getauxval(AT_HWCAP2)
(sys/auxv.h)

Cheers,
Ben.

> Cheers,
> Ben.
> 
> > Steve Pittman
> > 
> > 
> > 
> > From:        Peter Pirkelbauer <pirkelbauer at uab.edu>
> > To:        linuxppc-users at lists.ozlabs.org
> > Date:        07/09/2018 10:01 AM
> > Subject:        [Linuxppc-users] hardware transactions on power9
> > Sent by:        "Linuxppc-users" <linuxppc-users-bounces+skywalker=alum.mit.edu at lists.ozlabs.org>
> > 
> > 
> > 
> > Hi,
> > 
> > I am working on concurrent data structures built on top of hardware transactions.
> > 
> > Recently, I started testing on a Power 9 and ran into a problem with code that works well on a Power 8. When a transaction is started with __builtin_tbegin(0) the code terminates with an illegal instruction exception. (complete sample code is attached).
> > 
> > I used gcc 8.1 (compiled on the Power9) and I also tried gcc 7.3 to cross-compile on a power 8. The switch -mcpu=power9 was used on both systems.
> > 
> > The Power9 identifies as:
> > processor    : 159
> > cpu        : POWER9 (raw), altivec supported
> > clock        : 3000.000000MHz
> > revision    : 2.1 (pvr 004e 1201)
> > 
> > timebase    : 512000000
> > platform    : PowerNV
> > model        : 8335-GTG
> > machine        : PowerNV 8335-GTG
> > firmware    : OPAL
> > MMU        : Radix
> > 
> > The Power 9 system runs Red Hat Enterprise Linux Server release 7.5 (Maipo) and uname gives:
> > Linux cheaha02 4.14.0-49.2.2.el7a.ppc64le #1 SMP Fri Apr 27 15:37:52 UTC 2018 ppc64le ppc64le ppc64le GNU/Linux
> > 
> > I would appreciate any insights or pointers to relevant documentation.
> > 
> > Thank you,
> > Peter
> > 
> > -----
> > Peter Pirkelbauer, Ph.D.
> > Assistant Professor
> > http://iprogress.cis.uab.edu
> > 
> > Dept. of Computer Science
> > 136 Campbell Hall
> > University of Alabama at Birmingham
> > 1300 University Boulevard, Birmingham, Alabama 35294-1170
> > phone: (205) 934-8532
> > 
> > [attachment "testhtm.cc" deleted by Steve Pittman/San Francisco/IBM] 
> > _______________________________________________
> > Linuxppc-users mailing list
> > Linuxppc-users at lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-users
> > 
> > 
> > 
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> > Linuxppc-users at lists.ozlabs.org
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