[Linuxppc-users] hardware transactions on power9

[Peter Pirkelbauer]

Hi,

I am working on concurrent data structures built on top of hardware transactions.

Recently, I started testing on a Power 9 and ran into a problem with code that works well on a Power 8. When a transaction is started with __builtin_tbegin(0) the code terminates with an illegal instruction exception. (complete sample code is attached).

I used gcc 8.1 (compiled on the Power9) and I also tried gcc 7.3 to cross-compile on a power 8. The switch -mcpu=power9 was used on both systems.

The Power9 identifies as:
processor    : 159
cpu        : POWER9 (raw), altivec supported
clock        : 3000.000000MHz
revision    : 2.1 (pvr 004e 1201)

timebase    : 512000000
platform    : PowerNV
model        : 8335-GTG
machine        : PowerNV 8335-GTG
firmware    : OPAL
MMU        : Radix

The Power 9 system runs Red Hat Enterprise Linux Server release 7.5 (Maipo) and uname gives:
Linux cheaha02 4.14.0-49.2.2.el7a.ppc64le #1 SMP Fri Apr 27 15:37:52 UTC 2018 ppc64le ppc64le ppc64le GNU/Linux

I would appreciate any insights or pointers to relevant documentation.

Thank you,
Peter

-----
Peter Pirkelbauer, Ph.D.
Assistant Professor
http://iprogress.cis.uab.edu

Dept. of Computer Science
136 Campbell Hall
University of Alabama at Birmingham
1300 University Boulevard, Birmingham, Alabama 35294-1170
phone: (205) 934-8532

-------------- next part --------------
A non-text attachment was scrubbed...
Name: testhtm.cc
Type: text/x-c++src
Size: 261 bytes
Desc: not available
URL: <http://lists.ozlabs.org/pipermail/linuxppc-users/attachments/20180709/760e625c/attachment.cc>