Linux driver for Xilinx ICAP

MingLiu eemingliu at hotmail.com
Thu Oct 9 04:49:49 EST 2008


Dear Stephen,
 
>What architecture and core version are you running?
 
I am using ISE & EDK 9.2 with PR patch installed. The platform is a standard ML405 design generated by BSB. The xps_hwicap core is version 1.00a.
 
>I believe there is a DEBUG define, which will generate some logging messages.  It would be helpful if you can turn this on and then look at the resulting dmesg.
I will try to get some information with DEBUG enabled. If any progress, I will post in the maillist. 
>1) xps-hwicap1.00.a is huge..  It's much smaller to use opb-hwicap + plb46-opb bridge.  I don't think an updated version has been released, however.
 
Exactly. Fortunately in my design, I needn't care much on the resource utilization. I am only studying the partial reconfiguration feature. 
>2) I've had problems getting the ICAP interface to properly SYNC, which may be the problem here....  based on your response, we can debug further.Sorry that I didn't catch this meaning. What do you mean to SYNC? Is that a hardware problem or bug of the xps_hwicap core design?
 
BR
 
Ming
 

Subject: RE: Linux driver for Xilinx ICAPDate: Wed, 8 Oct 2008 08:38:06 -0700From: stephen.neuendorffer at xilinx.comTo: eemingliu at hotmail.com; linnj at xilinx.com; linuxppc-embedded at ozlabs.org

Ming,That's correct, the current driver is not interrupt driven, but simply polled.  Interrupts don't really add much except overhead, unless the core can DMA as well.What architecture and core version are you running?I believe there is a DEBUG define, which will generate some logging messages.  It would be helpful if you can turn this on and then look at the resulting dmesg.There are two things to be aware of:1) xps-hwicap1.00.a is huge..  It's much smaller to use opb-hwicap + plb46-opb bridge.  I don't think an updated version has been released, however.2) I've had problems getting the ICAP interface to properly SYNC, which may be the problem here....  based on your response, we can debug further.Steve-----Original Message-----From: MingLiu [mailto:eemingliu at hotmail.com]Sent: Wed 10/8/2008 7:47 AMTo: John Linn; linuxppc-embedded at ozlabs.orgCc: Stephen NeuendorfferSubject: RE: Linux driver for Xilinx ICAPDear John,Nice to hear from you. If possible, could you please show me your .mhs file concerning to the xps_hwicap core? Mine is listed as below:BEGIN xps_hwicap PARAMETER INSTANCE = xps_hwicap_0 PARAMETER HW_VER = 1.00.a PARAMETER C_BASEADDR = 0x40200000 PARAMETER C_HIGHADDR = 0x4020FFFF BUS_INTERFACE SPLB = plb PORT IP2INTC_Irpt = xps_hwicap_0_IP2INTC_IrptENDThe interrupt signal is connected to the interrupt controller.I suspect that the driver in Linux doesn't support interrupt mode for this core, since I didn't find interrupt handler registration function in the source code, like "request_irq", etc..I will appreciate if you can have some comments to me.BrMingSubject: RE: Linux driver for Xilinx ICAPDate: Wed, 8 Oct 2008 08:34:28 -0600From: John.Linn at xilinx.comTo: eemingliu at hotmail.com; linuxppc-embedded at ozlabs.orgCC: stephenn at xilinx.comHi Ming,I'm copying our local expert on this core to see his thoughts as I don't actively use this core myself.Thanks,JohnFrom: linuxppc-embedded-bounces+john.linn=xilinx.com at ozlabs.org [mailto:linuxppc-embedded-bounces+john.linn=xilinx.com at ozlabs.org] On Behalf Of MingLiuSent: Wednesday, October 08, 2008 7:48 AMTo: linuxppc-embedded at ozlabs.orgSubject: Linux driver for Xilinx ICAPDear all,Has someone manage to use the driver for the Xilinx xps_hwicap core to reconfigure bitstreams? I have enabled the driver in Linux configuration (version 2.6.24 from Xilinx tree). However I failed to use it to reconfigure bitstreams. The operations are listed as follows: # cp partial.bit /dev/icap0# No error information is shown, however the partial bitstream is not successfully configured. I checked /proc/devices and the device "icap" has been successfully registered with the major of 259. But in /proc/interrupts, I didn't find any matching entry of the interrupt for icap core. I tried to reconfigure the PR module with JTAG, and my design works well.  Any hints for this problem? Is the problem on the interrupt? Thanks so much if someone can help me.  BRMingWindows Live Writer,??????????,????????? ????!This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately._________________________________________________________________Windows Live Photo gallery ?????????,?????????,????????!http://get.live.cn/product/photo.htmlThis email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. 
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