MMU failure, Virtex4-FX60

[Robert Woodworth]

After further investigation...
There is a pending interrupt from the PLB waiting at bootup and it gets
hit by Linux when the MSR gets set and enables critical interrupts (same
time that it jumps into 0xC000XXXX).  The kernel code detects the
interrupt as a PLB data bus error and goes into crash sequence die().

I think I have a problem with my reset hardware, such that the PLB is
not getting reset correctly with the PPC.  With all interrupts disabled
and running a standalone C program, the PLB and memory work fine.
Any Virtex experts out there have any hints?



RJW.




On Mon, 2008-01-07 at 11:21 -0700, Grant Likely wrote:
> On 1/7/08, Robert Woodworth <rwoodworth at securics.com> wrote:
> > Hello!
> >
> > I'm building a new Virtex4-FX60 device.  I have built it with the new
> > MPMC3 and a 256MB SO-DIMM.  It works successfully with a "mem-test" type
> > embedded program.
> >
> > I cannot get it to boot a Linux kernel.  I have traced it down to the
> > MMU not getting mapped correctly.
> >
> > I can load the kernel via jtag, get the pre-boot messages on the serial
> > but then when it tries to jump to 0xc0002218 (start_here: head_4xxx.S)
> > it fails with a "Machine check exception; invalid instruction address".
> >
> > Using the debugger and examining the memory once the mmu is suppose to
> > be configured, I see that it is not mapping 0xc0000000  to the proper
> > location.  I'm sure I've set something up wrong in my FPGA and I need to
> > re-synthesize.  But what?
> 
> Hmmm, I haven't seen that failure mode before.  MMU handling on an of
> my virtex platforms has never been a problem.  Take a look at the TLB
> registers to see how they are configured to see if the mappings are
> really getting written.
> 
> What kernel version are you using?
> 
> Cheers,
> g.
>