device tree question

Scott Wood scottwood at freescale.com
Wed Sep 19 08:36:30 EST 2007


Alan Bennett wrote:
> I finally saw some light, though not much, and have made several
> changes to a new dts file.
> 
> BTW: I've lost my __log_buf
>   was 02aec04 now it's not there, nor is it Load Address: 0x00400000 +  02aec04

You can't rely on that sort of thing staying at the same address... 
check System.map to see where it is now.

> BRx/ORx=CSx
> 128MB flash: CS0 = F800_0000 f800_0000
> 128MB flash: CS4 = D000_0000 f800_0000
> 128MB SDRAM: CS1 = 0000_0000 f800_0000

Below, you seem to be assuming flash is CS0 and CS3, and that CS1 is BCSR.

> / {
> 	model = "MPC8248";
> 	compatible = "fsl,mpc8248";

Model/compatible should be for the board, not the chip.

> 		board-control at 1,0 {
> 			reg = <1 0 20>;
> 			compatible = "fsl,mpc8248-bcsr";
> 		};

BCSR is board-specific, not chip-specific.  The compatible should 
reference the specific board's name (with the board vendor replacing fsl).

> 		flash2 at 3,0 {

The unit address provides uniqueness; just do "flash at 3,0".

> 			compatible = "jedec-flash";

Note that this should be cfi-flash if your flash is CFI-compatible.

> 			reg = <0 0 8000000>;
> 			bank-width = <1>;
> 			device-width = <32>;

These are specified in bytes, not bits or chips.
I'm guessing you should set them both to 4 based on the above.

> 		};
> 		dualportram at 1,0 {

Should be dualportram at 5,0

> 			reg = <5 0 100000>;
> 			compatible = "fsl,mpc8248-dualportram";
> 		};
> 		dualportcsr at 1,0 {

Should be dualportcsr at 6,0

> 	soc at f0000000 {
> 		#address-cells = <1>;
> 		#size-cells = <1>;
> 		device_type = "soc";
> 		compatible = "fsl,mpc8272", "fsl,pq2-soc";

The 8272 references should be 8248, though it doesn't currently matt

> 			serial at 11a82 {
> 				device_type = "serial";
> 				compatible = "fsl,mpc8272-smc-uart",
> 				             "fsl,cpm2-smc-uart";
> 				reg = <11a82 20 8300 100>;
> 				interrupts = <2b 8>;
> 				interrupt-parent = <&PIC>;
> 				fsl,cpm-brg = <4>;
> 				fsl,cpm-command = <0ce00000>;

This doesn't look right...
You'll need to update reg, interrupts, and fsl,cpm-command for whichever 
SMC port you're using.

This is for SMC1 on the ep8248e:
	serial at 11a80 {
		device_type = "serial";
		compatible = "fsl,mpc8248-smc-uart",
		             "fsl,cpm2-smc-uart";
		reg = <11a80 20 1100 40>;
		interrupts = <4 8>;
		interrupt-parent = <&PIC>;
		fsl,cpm-brg = <7>;
		fsl,cpm-command = <1d000000>;
	};

Note that the 1100 in reg should be set to wherever your firmware 
locates the SMC's parameter RAM block, and fsl,cpm-brg should be set to 
whichever BRG your firmware and/or platform code set the SMC port to.

> 			mdio at 10d40 {
> 				device_type = "mdio";
> 				compatible = "fsl,mpc8272ads-mdio-bitbang",
> 				             "fsl,mpc8272-mdio-bitbang",
> 				             "fsl,cpm2-mdio-bitbang";
> 				reg = <10d40 14>;
> 				#address-cells = <1>;
> 				#size-cells = <0>;
> 				fsl,mdio-pin = <12>;
> 				fsl,mdc-pin = <13>;

Does your board do mdio the same way as the mpc8272ads board?  if not, 
you'll have to change this.

-Scott



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