How do external irq's get mapped?

[Andy Fleming]

On Apr 30, 2007, at 09:32, Charles Krinke wrote:

>
>
> At this point, I would just like to confirm I am thinking clearly and
> now understand the IRQ mapping. We are constrained to finish this
> project with the kernel we started with, linux-2.6.17.11, so this
> discussion is centered around that code base. This is my understanding
> based on last week's e-mails and my research.
>
> 1. In arch/ppc/platforms/85xx/mpc85xx_cds_common.c is the
> mpc85xx_cds_openpic_initsenses[] whose first 4 members are set to
> IRQ_SENSE_LEVEL or'ed with IRQ_POLARITY_NEGATIVE. This means the first
> four external interrupts are enabled and neg polarity. I can use these
> entries as is and change the others from 0x0 as I need more of the
> external interrupt pins.
>
> Just for reference, here are a few lines from mpc85xx_cds_init_IRQ
>
> mpc85xx_cds_init_IRQ(void)
> {
> 	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
> 	/* Map PIC IRQs 0-11 */
> 	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);


This line is almost more important:

         openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);

You need to find out what that is defined to be.  My tree says it's  
defined as CPM_IRQ_OFFSET + NR_CPM_INTS (or 0, if CONFIG_CPM2 isn't  
defined).

So that's the 80, if NR_8259_INTS is 16.  Otherwise it's 64.  So 112  
could work, but if you have your config different, the numbers will  
move.


>
> 2. In this routine, the first openpic_set_source call is for the 32
> internal IRQ's and the second openpic_set_sources maps the 12 external
> IRQ's beginning at 48, so that means my external IRQ mapping is:
>
> ExtIrQ    LinuxIrqNum
> 0		48 (first four are enabled)
> 1		49
> 2		50
> 3		51
> 4		52 (last 8 not enabled by default)
> 5		53
> 6		54
> 7		55
> 8		56
> 9		57	
> 10		58	
> 11		59
>
> Is this correct?


Depends on your configuration.  But probably not.  The CPM takes up  
some space, too.

Andy