[PATCH alternative] lite5200(b) support for i2c
Domen Puncer
domen.puncer at telargo.com
Mon Mar 5 21:08:02 EST 2007
Add fsl-i2c to lite5200 i2c nodes in device tree, and enable FSL_SOC.
Tested to work with built-in eeprom on lite5200b.
Signed-off-by: Domen Puncer <domen.puncer at telargo.com>
---
This patch obsoletes the previous one, and is shorter too :-)
arch/powerpc/Kconfig | 1 +
arch/powerpc/boot/dts/lite5200.dts | 6 ++++--
arch/powerpc/boot/dts/lite5200b.dts | 6 ++++--
3 files changed, 9 insertions(+), 4 deletions(-)
Index: grant.git/arch/powerpc/Kconfig
===================================================================
--- grant.git.orig/arch/powerpc/Kconfig
+++ grant.git/arch/powerpc/Kconfig
@@ -128,6 +128,7 @@ config CLASSIC32
bool "52xx/6xx/7xx/74xx"
select PPC_FPU
select 6xx
+ select FSL_SOC
help
There are four families of PowerPC chips supported. The more common
types (601, 603, 604, 740, 750, 7400), the Motorola embedded
Index: grant.git/arch/powerpc/boot/dts/lite5200b.dts
===================================================================
--- grant.git.orig/arch/powerpc/boot/dts/lite5200b.dts
+++ grant.git/arch/powerpc/boot/dts/lite5200b.dts
@@ -323,20 +323,22 @@
i2c at 3d00 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
i2c at 3d40 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
sram at 8000 {
device_type = "sram";
Index: grant.git/arch/powerpc/boot/dts/lite5200.dts
===================================================================
--- grant.git.orig/arch/powerpc/boot/dts/lite5200.dts
+++ grant.git/arch/powerpc/boot/dts/lite5200.dts
@@ -318,20 +318,22 @@
i2c at 3d00 {
device_type = "i2c";
- compatible = "mpc5200-i2c";
+ compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
i2c at 3d40 {
device_type = "i2c";
- compatible = "mpc5200-i2c";
+ compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
sram at 8000 {
device_type = "sram";
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