ML403 Hard TEMAC, PLB and Linux 2.6

Rick Moleres Rick.Moleres at
Fri Jul 20 01:00:33 EST 2007



The first thing I would try is to make sure eth1 comes up without first bringing up eth0.  In other words, does it come up independently?  If not, there could be something wrong with its configuration in the kernel or perhaps a hardware design issue.  If both interfaces come up independently, but not together, then there¡¯s likely a driver issue as we have not tested dual channel TEMAC with the Linux plb_temac driver.  Perhaps others on the list have.  The areas that I would look at would be:  make sure each interface is getting a unique and correct PHY address; make sure any calls to the shared registers of the two channels are protected with semaphores/spinlocks.  For example, I¡¯m pretty sure the PHY registers are shared, so any PHY accesses should be protected.  I would think other Xilinx driver accesses like Start/Stop/Reset/Get or SetOptions/etc¡­ should be protected as they may access shared registers.





From: Massimiliano.Patriarca at [mailto:Massimiliano.Patriarca at] On Behalf Of linux-ppc at
Sent: Thursday, July 19, 2007 7:51 AM
To: Rick Moleres
Cc: Ming Liu; linuxppc-embedded at; at; mamsadegh at
Subject: RE: ML403 Hard TEMAC, PLB and Linux 2.6


Hi, we are trying to use both side of an hard temac + 2 plb temac in a Virtex4FX12 project. 
we succesfull implemented a single temac Montavista tree with eth0. 
when trying to use both temac, devices are correctly registered with kernel- 
eth0 comes up and working ok- 
when manually start eth1 (/sbin/ifconfig eth1 up) kernel hang without any error or info in the console 

# dmesg 
Linux version 2.6.10_mvl401-ml40x (massimiliano at linux-yhbz) (gcc version 3.4.3 (MontaVista 3.4.3- 2007-04-01)) #250 Wed Jul 18 12:20:43 CEST 2007 
Eurotel motherboard init 
Port by MontaVista Software, Inc. (source at 
On node 0 totalpages: 7812 
  DMA zone: 7812 pages, LIFO batch:1 
  Normal zone: 0 pages, LIFO batch:1 
  HighMem zone: 0 pages, LIFO batch:1 
Built 1 zonelists 
Kernel command line: console=ttl0 root=/dev/xsysace2 rw ip=off 
Xilinx INTC #0 at 0x41200000 mapped to 0xFDFFF000 
PID hash table entries: 128 (order: 7, 2048 bytes) 
hr_time_init: arch_to_nsec = 8192000, nsec_to_arch = 1099511627 
Console: colour dummy device 80x25 
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) 
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) 
Memory: 28420k available (1864k kernel code, 528k data, 124k init, 0k highmem) 
Calibrating delay loop... 252.92 BogoMIPS (lpj=126464) 
Mount-cache hash table entries: 512 (order: 0, 4096 bytes) 
desched cpu_callback 3/00000000 
ksoftirqd started up. 
desched cpu_callback 2/00000000 
desched thread 0 started up. 
NET: Registered protocol family 16 
Registering platform device 'xilinx_temac.0'. Parent at platform 
Registering platform device 'xilinx_temac.1'. Parent at platform 
Registering platform device 'xilinx_sysace.0'. Parent at platform 
Registering platform device 'xilinx_gpio.0'. Parent at platform 
Registering platform device 'xilinx_gpio.1'. Parent at platform 
Registering platform device 'oled_fb.0'. Parent at platform 
Generic PHY: Registered new driver 
oled_fb: 4096 video memory mapped to c2011000 
Console: switching to colour frame buffer device 16x8 
xgpio #0 at 0x40000000 mapped to 0xC2020000 
xgpio #1 at 0x40020000 mapped to 0xC2040000 
io scheduler noop registered 
io scheduler anticipatory registered 
io scheduler deadline registered 
io scheduler cfq registered 
loop: loaded (max 8 devices) 
elevator: using anticipatory as default io scheduler 
System ACE at 0x41800000 mapped to 0xC2060000, irq=4, 1000944KB 
 xsysace: xsysace1 xsysace2 
Universal TUN/TAP device driver 1.5 (C)1999-2002 Maxim Krasnyansky 
XTemac: using FIFO direct interrupt driven mode. 
eth0: Xilinx TEMAC #0 at 0x20000000 mapped to 0xC2080000, irq=0 
eth0: XTemac id 1.0f, block id 5, type 8 
XTemac: using FIFO direct interrupt driven mode. 
eth1: Xilinx TEMAC #1 at 0x20010000 mapped to 0xC20A0000, irq=10 
eth1: XTemac id 1.0f, block id 5, type 8 
i2c /dev entries driver 
i2c-xil_custom: registered with I2C (0) 
i2c-xil_custom: registered with I2C (1) 
mice: PS/2 mouse device common for all mice 
NET: Registered protocol family 2 
IP: routing cache hash table of 512 buckets, 4Kbytes 
TCP: Hash tables configured (established 2048 bind 4096) 
NET: Registered protocol family 1 
NET: Registered protocol family 17 
EXT3-fs warning: maximal mount count reached, running e2fsck is recommended 
kjournald starting.  Commit interval 5 seconds 
EXT3 FS on xsysace2, internal journal 
EXT3-fs: recovery complete. 
EXT3-fs: mounted filesystem with ordered data mode. 
VFS: Mounted root (ext3 filesystem). 
Freeing unused kernel memory: 124k init 
eth0: XTemac: Options: 0xb8f2 
eth0: XTemac: speed set to 100Mb/s 
eth0: XTemac: PHY Link carrier lost. 

# /sbin/ifconfig eth1 up 
# eth1: XTemac: Options: 0xb8f2 

Any suggestion? 

"Rick Moleres" <Rick.Moleres at> 
Sent by: at 

08/02/2007 17.23 


"Ming Liu" <eemingliu at>, <mamsadegh at> 


linuxppc-embedded at 


RE: ML403 Hard TEMAC, PLB and Linux 2.6





As Ming says the Linux 2.6 TEMAC driver is made available in EDK 8.2.2 as part of the BSP and Libraries generation for Linux 2.6.  Note that we made a recent fix for better PHY address detection and speed negotiation. I've attached the adapter here, and it will be available in EDK 9.1.1 when that's released.


-----Original Message-----
From: at [ at] On Behalf Of Ming Liu
Sent: Thursday, February 08, 2007 2:31 AM
To: mamsadegh at
Cc: linuxppc-embedded at
Subject: RE: ML403 Hard TEMAC, PLB and Linux 2.6

In xapp902, they are using the old cores for Temac. So it will be easier to 
generate a project in EDK 8.2. Not only the cores there are new, but also 
it can generate the driver for linux 2.6.


>From: Mohammad Sadegh Sadri <mamsadegh at>
>To: <christophe.alayrac at>
>CC: linuxppc-embedded at
>Subject: RE: ML403 Hard TEMAC, PLB and Linux 2.6
>Date: Thu, 8 Feb 2007 07:13:47 +0000
>Thanks for reply
>Well, regarding xapp902, there is a very simple question, Where can I find 
it? It seems that Xilinx has deleted all of the links to these files.
> > Subject: Re: ML403 Hard TEMAC, PLB and Linux 2.6
> > From: christophe.alayrac at
> > To: mamsadegh at
> > CC: linuxppc-embedded at
> > Date: Thu, 8 Feb 2007 06:51:45 +0100
> >
> > Le mercredi 07 février 2007 ?22:30 +0000, Mohammad Sadegh Sadri a
> > écrit :
> > Hi Mohammad,
> >
> > Please find here after some answer
> >
> > > 1- I want to use, ML403, Hard TEMAC and PLB TEMAC cores. Is there any 
ready to use design, or any reference design available for this?
> > > I'm using EDK 8.1 and I understood that, when I choose the ML403 
board , EDK does not use hard temac, so , should I add it manually? ( well 
this is funny, but the wizard does not use hard temac , is it true? )
> > > Is there any ready EDK projects for ML403, with TEMAC and PLB TEMAC 
modules already inserted and cofigured? (I don't want to use GSRD ) ( If 
yes would you please put the link here )
> > >
> > You can start from XAPP 902 from Xilinx, this design demonstrate TEMAC
> > use in loopback mode. Some memers from that community have tried from
> > that design as a starting point. I did not nknow if the succeed.
> > I would recommand to get EDK 8.2 SP2 and use the Wizard to build a new
> > design with TEMAC.
> >
> > > 2- Simply, Is there any driver available for linux 2.6 , for PLB 
TEMAC and Hard TEMAC modules? If yes , can you put the link here, so that I 
can download it?
> > >
> > For the kernel you can get it from Montavista source code site using 
> > to download it (linux-xilinx-26). This is version (last week!)
> >
> > Then you will need to pacth the Kernel with TEMAC drivers (look for
> > TEMAC PAULUS MVISTA with google, or follow my messages in that mailing
> > list)
> > NOTE: If you use that TEMAC patch do not use SGDMA on your TEMAC, use
> > FIFO.
> >
> > > thanks
> > Regards
> >
> > Chris
> > > _________________________________________________________________
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> >
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