Xilinx ML310 Linux 2.6 PCI bridge

[Stephen Neuendorffer]

> That's where things get complicated...  In our lab, we get expensive
> hardware such as the BEE2 via CMC Microsystems (a Canadian granting
> agency).  However, getting funds locally to buy other equipment is a
> relatively long and administratively complex process...

Yeah, I understand how such things go... :)

> I find it strange that Xilinx would not invest in supporting Linux 2.6
> for an important feature such as a PCI bridge (not specifically for
> the ML-310, but in general) when this can bring many interesting
> benefits to an embedded platform.  Is this something that is "in
> progress" at Xilinx?  You seem to imply that most of the difficulty in
> getting the PCI core working is in meeting the timing requirements
> (not with the SW drivers), so I might be missing driver files when I
> generate the BSP code for Linux 2.6.

The PCI core needs a separate driver for generating the right
constraints.  In EDK 9.2 there is some linux 2.6 support for this, but
the code won't work with any of the new kernels.  I've pulled the
changes into my internal git tree, but for reasons that I haven't been
able to ascertain, there are hardcoded xparameter-based interrupt
defines in the super I/O bridge controller.

In any event, I'll send you the patches directly and you can try getting
it to work, although you'll likely need to carefully write the
xparameters by hand.  If you can get away without networking, I'd do
that, though.  :)

Steve