[RFC] SystemACE driver - abstract register ops

[Grant Likely]

On 4/27/07, John Williams <jwilliams at itee.uq.edu.au> wrote:
> Grant,
>
> Thanks for your work on the SystemACE driver - I'll be porting/merging
> this across to MicroBlaze very shortly.

Very cool; I hope it works well.

> Given that SysACE can be hooked up in any number of ways, bit widths,
> endians, PPC/Microblaze, can you please offer your comments on the
> attached patch?

Okay, after getting over my initial mirth about working on the *exact*
same thing and finishing it at the *exact* time that you sent me your
patch, I think I'm ready to make useful comments.  :-)
>
> It introduce a private ace_reg_ops structure, with various member
> functions for the different kinds of accesses to the HW.
>
> This patch should not change the functionality of your original driver
> at all, it's just groundwork for what's to come.
>
> I recognise that it adds indirection into the various access paths, and
> potentially a little bloat.  Whether this is better than #if
> 1...#else...#endif is debatable.

I'm not to concerned with the added redirection.  On my 405 designs, I
find that bus overhead has a far greater impact than any of the
processing paths in the driver, so this shouldn't be a problem.
Besides, when we finally move to arch/powerpc, it will become very
feasable to have a single kernel image that will boot on multiple
ppc405 FPGA configurations; just change the device tree passed in.

> Similar issues will arise for most (all?) of the Xilinx drivers that we
> will share between PPC and MicroBlaze.  Hopefully we can converge on a
> nice consistent and clean way of handling these dual arch drivers.

I agree 100%

For your reading pleasure, I've attached the bus attachment changes
that I've made in my tree.  I hope to get this driver accepted into
mainline during the 2.6.22 merge window; so please get any comments
you have back to me ASAP.

Cheers,
g.
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