[PATCH] IBM GPIO driver for PowerPC 4xx is back from the dead

Eugene Surovegin ebs at ebshome.net
Sat Sep 30 02:46:09 EST 2006


On Fri, Sep 29, 2006 at 11:06:19AM +0200, Arnd Bergmann wrote:
> 
> > +{
> > +       u32 cfg_reg;
> > +
> > +       if (device != 0)
> > +               return -ENXIO;
> > +
> > +#ifdef CONFIG_40x
> > +#ifdef DCRN_CHCR0
> > +       /*
> > +        * PPC405 uses CPC0_CR0 to select multiplexed GPIO pins.
> > +        */
> > +       cfg_reg = mfdcr(DCRN_CHCR0);
> > +       cfg_reg = (cfg_reg & ~mask) | (data & mask);
> > +       mtdcr(DCRN_CHCR0, cfg_reg);
> > +#endif
> > +#elif CONFIG_440GP
> > +       /*
> > +        * PPC440GP uses CPC0_GPIO to select multiplexed GPIO pins.
> > +        */
> > +       cfg_reg = mfdcr(DCRN_CPC0_GPIO);
> > +       cfg_reg = (cfg_reg & ~mask) | (data & mask);
> > +       mtdcr(DCRN_CPC0_GPIO, cfg_reg);
> > +#elif CONFIG_440GX
> > +       /*
> > +        * PPC440GX uses SDR0_PFC0 to select multiplexed GPIO pins
> > +        */
> > +       cfg_reg = SDR_READ(DCRN_SDR_PFC0);
> > +       cfg_reg = (cfg_reg & ~mask) | (data & mask);
> > +       SDR_WRITE(DCRN_SDR_PFC0, cfg_reg);
> > +#else
> > +#error This driver is only supported on PPC40x and PPC440 CPUs
> > +#endif
> 
> This prevents building a single kernel for multiple 440 version.
> Please use a run-time check, or better get the necessary information
> from the device tree.

440 kernels _are_ built for each particular 440 chip separately, and 
not all these defines are even available simultaneously.

So, frankly, I don't understand your complain here. We don't support 
single kernel image running on different 440s. Also, last time I 
checked, 440 port wasn't using device tree as well.

-- 
Eugene




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