Ethernet driver for Linux kernel 2.6 running on ML403

Grant Likely grant.likely at secretlab.ca
Wed Sep 20 00:17:16 EST 2006


On 9/19/06, Peter Korsgaard <jacmet at sunsite.dk> wrote:
> >>>>> "GL" == Grant Likely <grant.likely at secretlab.ca> writes:
> GL> If we reject the Xilinx driver code, then we either have to do
> GL> without Xilinx support in mainline, or we need to write new
> GL> drivers that address the above issues (support multiple IP
> GL> versions, etc).  The Xilinx support in mainline right now does not
> GL> use any Xilinx code.  (Xilinx PIC and UART).
>
> I think the best option is to simply forget about the Xilinx code,
> see the FPGAs as any other PPC system and write normal device drivers
> for it. Your platform bus stuff and my (to-be-mainlined) uartlite
> driver is a first step in this direction..

Too bad platform bus is sooo last year.  :p

Time to hack device trees.
g.

-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely at secretlab.ca
(403) 399-0195



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