[PATCH 1/2] Add MPC52xx Interrupt controller support for ARCH=powerpc
Dale Farnsworth
dale at farnsworth.org
Tue Oct 31 04:47:24 EST 2006
In article <200610292310.k9TNAHXZ013852 at post.webmailer.de> Nicolas wrote:
> This patch add MPC52xx Interrupt controller for ARCH=powerpc.
>
> It includes the main code in arch/powerpc/sysdev/ ad well as an header file in
> include/asm-powerpc.
>
> Signed-off-by: Nicolas DET <nd at bplan-gmbh.de>
Wow, the source code size sure ballooned in this revision.
I'd like to see us go the other direction, with something like the
following (untested code).
-Dale Farnsworth
(BTW, I sent a patch containing these changes to Nicolas last week.)
-----------------------
static inline void io_be_setbit(u32 __iomem *addr, int bitno)
{
out_be32(addr, in_be32(addr) | 1 << bitno);
}
static inline void io_be_clrbit(u32 __iomem *addr, int bitno)
{
out_be32(addr, in_be32(addr) & ~(1 << bitno));
}
static void mpc52xx_ic_mask(unsigned int virq)
{
u32 val;
int irq;
int l1irq;
int l2irq;
irq = irq_map[virq].hwirq;
l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
pr_debug("%s: irq=%x. l1=%d, l2=%d\n", __func__, irq, l1irq, l2irq);
switch (l1irq) {
case MPC52xx_IRQ_L1_CRIT:
case MPC52xx_IRQ_L1_MAIN:
if (l2irq <= 3)
io_be_clrbit(&intr->ctrl, 11 - l2irq);
else
io_be_setbit(&intr->main_mask, 16 - l2irq);
break;
case MPC52xx_IRQ_L1_PERP:
io_be_setbit(&intr->per_mask, 31 - l2irq);
break;
case MPC52xx_IRQ_L1_SDMA:
io_be_setbit(&sdma->IntMask, l2irq);
break;
}
}
static void mpc52xx_ic_unmask(unsigned int virq)
{
u32 val;
int irq;
int l1irq;
int l2irq;
irq = irq_map[virq].hwirq;
l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
pr_debug("%s: irq=%x. l1=%d, l2=%d\n", __func__, irq, l1irq, l2irq);
switch (l1irq) {
case MPC52xx_IRQ_L1_CRIT:
case MPC52xx_IRQ_L1_MAIN:
if (l2irq <= 3)
io_be_setbit(&intr->ctrl, 11 - l2irq);
else
io_be_clrbit(&intr->main, 16 - l2irq);
break;
case MPC52xx_IRQ_L1_PERP:
io_be_setbit(&intr->per_mask, 31 - l2irq);
break;
case MPC52xx_IRQ_L1_SDMA:
io_be_clrbit(&sdma->IntMask, l2irq);
break;
}
}
static void mpc52xx_ic_ack(unsigned int virq)
{
u32 val;
int irq;
int l1irq;
int l2irq;
irq = irq_map[virq].hwirq;
l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET;
pr_debug("%s: irq=%x. l1=%d, l2=%d\n", __func__, irq, l1irq, l2irq);
switch (l1irq) {
case MPC52xx_IRQ_L1_CRIT:
case MPC52xx_IRQ_L1_MAIN:
if (l2irq <= 3)
io_be_setbit(&intr->ctrl, 27 - l2irq);
break;
case MPC52xx_IRQ_L1_PERP:
io_be_clrbit(&intr->per_mask, 31 - l2irq);
break;
case MPC52xx_IRQ_L1_SDMA:
out_be32(&sdma->IntPend, 1 << l2irq);
break;
}
}
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