[PATCH 1/2] Add MPC52xx Interrupt controller support for ARCH=powerpc

[Grant Likely]

On 10/31/06, Nicolas DET <nd at bplan-gmbh.de> wrote:
> Kumar Gala wrote:
> > +/* MBAR position */
> > +#define MPC52xx_MBAR        0xf0000000    /* Phys address */
> > +#define MPC52xx_MBAR_VIRT    0xf0000000    /* Virt address */
> > +#define MPC52xx_MBAR_SIZE    0x00010000
> > +
> > +#define MPC52xx_PA(x)        ((phys_addr_t)(MPC52xx_MBAR + (x)))
> > +#define MPC52xx_VA(x)        ((void __iomem *)(MPC52xx_MBAR_VIRT + (x)))
> >
> > This should be handled dynamically (pulled from the device tree), I
> > doubt MBAR will be at the same location for all boards.
>
> Well, 0xf000000 seems some kind of 'standart' value. we could have a
> global variable 'mpc52xx_mbar' which would be default 0xf0000000 and
> modified by each platform.

In my lite5200 device tree; I've got an "soc5200 at f0000000" node which
provides the MBAR base address.

-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely at secretlab.ca
(403) 399-0195