Does the CPM uart driver need more memory barriers ?

Laurent Pinchart laurent.pinchart at tbox.biz
Wed May 17 19:43:58 EST 2006


Hi everybody,

while trying to debug a serial port issue, I found out some code might seemed 
to miss write memory barriers. Does the volatile keyword guarantee that gcc 
will no reorder memory writes, or is the attached patched needed ?

Best regards,

Laurent Pinchart
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