kernel startup

atul.sabharwal at exgate.tek.com atul.sabharwal at exgate.tek.com
Sat Feb 11 13:10:17 EST 2006


More efficient would be to lock the exception handlers in L1 cache.  I
don't know the access rate of DPRAM on 870? Should be bus speed? So,
DPRAM and external memory would be same access time unless the
electrical characteristics of RAM vs. DPRAM technology is different.
--
Atul



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