LITE5200B Powerfail

[Pedro Luis D. L.]

Hi all,

I not pretty sure if this is the correct forum to ask for a solution but I 
know that some of you have worked on a driver to make PSCs in this board 
work in an I2S mode.

Have you ever have powerfail problems when writing the configuration 
registers for this mode?

I´ve delimited the problem:
- GPIO Port Config register stores without problems the value "111" in bits 
25:27 (PSC2 to work in CODEC2 functionality with MCLK).
- When I write a "1" in PSC2->SICR register bit GenClk  to ensure that clock 
and FrameSync are generated internally from MCLK the systems suffers a 
powerfail and I suppose that´s consecuence or some kind of shortcircuit. 
I´ve followed the same steps made by Bob Peterson in
http://ozlabs.org/pipermail/linuxppc-embedded/2005-September/020210.html
to write the configuration in the proper registers but I still suffer the 
powerfail when GenClk is activated or, if I activate that bit first, when 
Port Config is written.
I´m also trying to understand how things are done in Roman Fietze driver but 
can´t find a difference. That makes me think that perhaps other registers 
must be modificated before driver loading. Meanwhile, I keep waiting for 
Grant Likely release, :-).
Has this happened to someone before?

Thanks for your help.

    Pedro.

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