stepping through atomic_dec_return
Michael Richardson
mcr at sandelman.ottawa.on.ca
Sat Oct 8 03:15:28 EST 2005
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I have what I think is a semaphore problem.
Certainly there is an attempt to down(&sem) when sem->count ==
0. (that's my root cause, which I'm now going to examine)
However, down() in semaphore.h should just fail and call __down().
The problem seems to be that loop in atomic_dec_return(), which
uses lwarx/stwcw seems to never end:
"1: lwarx %0,0,%1 # atomic_dec_return\n\
addic %0,%0,-1\n"
PPC405_ERR77(0,%1)
" stwcx. %0,0,%1\n\
bne- 1b"
SMP_ISYNC
: "=&r" (t)
: "r" (&v->counter)
: "cc", "memory");
lwarx sets the "RESERVED" bit, and stwcx, copies that to the CR0[EQ]
bit, which bne tests.
I don't know what the "-" in the bne means. Is it significant?
I checked, and CONFIG_IBM405_ERR77 is in my .config, so that shouldn't
be the issue. (I think the work around is just a performance issue on
devices without the defect)
I can see how setting through this code with the debugger could cause a
problem, since there would be debug exceptions, and there would be other
code in the debug stubs that could set the RESERVED=0. It's hard to
know, but it seems unlikely to me.
(This is a UP system)
However, I would expect that I can set a break point after this call and
things would work fine. They do not, I get stuck in this loop.
Any comments?
- --
] ON HUMILITY: to err is human. To moo, bovine. | firewalls [
] Michael Richardson, Xelerance Corporation, Ottawa, ON |net architect[
] mcr at xelerance.com http://www.sandelman.ottawa.on.ca/mcr/ |device driver[
] panic("Just another Debian GNU/Linux using, kernel hacking, security guy"); [
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