Arabella Resource Manager

[McMullan, Jason]

Interesting code, but not generic enough.
What would be nicer would be an API like the following, that can be
easily extended, and work for more than just PQ (and ppc, for that
matter)

enum bres_type {
	BRES_TYPE_CLOCK = 0,
	BRES_TYPE_PIN,
	BRES_TYPE_CPM_SRAM,
	...
	BRES_TYPE_MAX,
}

struct bres_pool {
	struct resource *pool;
	int (*set)(int id, ...);
	int (*clear)(int id);
};

/* Board setup will set up the available regions
 * into this array, similar as to how the PCI 
 * system sets up the iomem areas.
 */
struct bres_pool *board_resource[BRES_TYPE_MAX];

/* Request a resource out of the available pools
 */
int bres_request(enum bres_type type, const struct resource *req);

/* Free a requested resource 
 * This also calls the 'clear' function of the pool.
 */
int bres_release(enum bres_type type, const struct resource *res);


/* After request completes, you can 'instance'
 * the resource.
 */

/* Wire a pin
 * pin is the same as you requested in the resource
 * pin type is defined in either the board or SoC CPU headers
 *  (ie CPM_PB17_SDL)
 */
static inline int bres_pin_wire_as(int pin, int pin_type)
{  return board_resource[BRES_TYPE_PIN].instance(pin, pin_type); }

/* Wire a clock
 */
static inline int bres_clock_wire_as(int clock, int clock_target,
			int multiplier, int divider)
{  return board_resource[BRES_TYPE_CLOCK].instance(pin, pin_type); }

...etc....



-- 
Jason McMullan <jason.mcmullan at timesys.com>
TimeSys Corporation

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