RFC: PHY Abstraction Layer II
Andy Fleming
afleming at freescale.com
Wed Mar 9 12:47:53 EST 2005
I've finally gotten all of ebs's suggestions into the PHY code. Here
is the new version. It has the following improvements:
* All PHYs now determine speed,duplex, etc using the same generic code,
rather than PHY-specific registers.
* The genphy driver works for gigabit PHYs now, as well. In theory, if
your PHY isn't broken in some way (I've encountered a number that are),
you should be able to just use genphy.
* The genphy driver now detects what features the PHY has, rather than
relying on arbitrarily hard-coded values
* Pause negotiation and advertising has been added
* PHY read and write functions now return errors if the bus read/write
functions return errors. These errors are handled properly, and should
not cause any problem. It is the bus's responsibility, however, to
make sure that the PHY is started again once the error is cleared.
This patch contains just the PHY code. A later email will contain the
gianfar driver and 85xx patches, which will serve as an example for how
to use the PHY code.
A note about size: I did some rough size comparisons, and it looks
like this code adds ~10 K to the binary size of the kernel (for PPC 32,
85xx). However, that's a rough estimate, since my tree includes
features added to the gianfar driver (eg: ethtool support for setting
speed/duplex).
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Andy Fleming
Open Source Team
Freescale Semiconductor, Inc
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