MPC5200B boot failure help needed

[David Wolfe]

[ Susheel Raj writes: ]
> now the problem is that if i use MPC5200 Rev A then
> the kernel boots without any problem and gets into the
> command 
> 
> but when i am using MPC5200 Rev B it shows like this

If you're using rev.B1 silicon (mask M08A), you'll need to set the as
of yet undocumented TXW_MASK bit (13 in PPC bit ordering) in the Rx
FIFO control register (MBAR + 0x318c). Thus, set &fec->rfifo_cntrl to
0x0f040000 in mpc5xxx_fec_setup().

Rev.B2 (mask M62C) forces TXW_MASK to zero, but also masks the TXW
interrupt (0x40000000) in the status register resulting in no change
from rev.A (L25R) silicon.

If you're still having problems with Ethernet, I would suggest debugging
it with a root file system on something other than NFS. E.g. ramdisk,
MTD or ATA.

-- 
David Wolfe
Infotainment, Multimedia and Telematics Division
Freescale Semiconductor