[PATCH] Handle I-TLB Error and Miss separately on 8xx

[Joakim Tjernlund]

> On Fri, Jan 14, 2005 at 08:51:44PM +0100, Joakim Tjernlund wrote:
> 
> > BTW, there is a simpler fix to the TLB Miss problem.
> > In the TLB Miss handlers, just move the 2: label a few instr. upwards to
> > the same line as the "li	r21, 0x00f0". That way you will force a 
> > TLB error. You can do this for both Data and Instr. Miss handlers.
> > The code after where the 2: label used to be can be deleted. 
> 
> Like this?  Only lightly tested on my rpxlite on 2.6:

Something related I wonder about. Is it necessary to update the ACCESSED
	ori	r10, r10, _PAGE_ACCESSED
	stw	r10, 0(r11)
bit in the pte? 2 instr. and a cache line write will be saved in each TLB Miss handler
if this step can be omitted. Any MM gurus around?

 Jocke