CPU15 errata workaround for 8xx by WD

[Joakim Tjernlund]

Hi Wolfgang

Had a look at your CPU15 errata workaround for 8xx and I have a comment
or two:

1) I think you should make the sysctl support a compile time option
   as the overhead for sysctl support in the TLB handler is 6 instr. when
   the fix itself is only 4 instr.

2) You placed the workaround in the middle of the CPU6 workaround which will
   disable the CPU6 workaround(I think). Move it before the #ifdef CONFIG_8xx_CPU6
   and you should be fine.

3) Your test program uses the dcbst and dcbi instr. and these are buggy as they do not
   update the DAR register in the TLB exceptions. I guess you made sure that such errors
   will not happen?

4) The CPU15 bug has been around for years I think, what made it show up now? New toolchains?
   

 Jocke