On Wed, Feb 23, 2005 at 08:59:14PM +0000, James Chapman wrote: > Add mv64x60 GPP IO pin/IRQ register definitions [snip] > #define MV64x60_IRQ_TIMER_6_7 11 > +#define MV64x60_IRQ_P1_GPP_0_7 24 Please use consistent spacing. Thanks. -- Tom Rini http://gate.crashing.org/~trini/