Rev B MPC5200 , Hardware related Querry

[Susheel Raj]

Hi all,

  I have been spending some time with the MPC5200 Rev
B processors, mostly concentrating to make it go to
DEEP SLEEP MODE, also posted many times regarding
this.

 Sylvain has given me his previous work on his attempt
to make the core to Sleep and i found that when
asserting bit mode_en in SDRAM control register (MBAR
+ 0x0104), the core restarts.

 Initaially I was thinking that the core restarts bcos
of some very bad exception or something but when i
tried to debug Instruction by instruction i found that
the core just restarts when we try to set mode_en bit
like below


	/* Put SDRAM to self refresh */
	lwz     r11, 0x0104(r3)
	oris	r10, r11, 0x8000
	stw	r10, 0x0104(r3)		/* Enable SDRAM mode register */
	eieio
 /*  r3 has the address of MBAR */

The above code make the core to restart when i comment
the stw instruction

	/* Put SDRAM to self refresh */
	lwz     r11, 0x0104(r3)
	oris	r10, r11, 0x8000
	stw	r10, 0x0104(r3)			
eieio


Susheel

                    More Smiles Per Hour




		
____________________________________________________
Start your day with Yahoo! - make it your home page 
http://www.yahoo.com/r/hs