8xx UART TX > 8 data bits
robin.gilks at tait.co.nz
Wed Apr 13 09:17:18 EST 2005
I'm trying to get an SMC channel to operate as a UART with more than 8
data bits (13 in fact!!). Using a 2.4.22 kernel on a mpc859 (basic 866).
This means its going to be getting two half words from the BDs for each
'character'. With the constraints of the SMC requiring even addresses
etc for this mode of operation, does anyone know if it will work writing
2x8 bit characters at a time so as to keep the existing tty structure
for SMC handling?
I've tried tracing the tty layers by code inspection but I keep getting
lost in the indirections!! If I could find how the BDs are allocated as
a result of a character write, then perhaps I could make minor mods to
ensure memory allocs on an even address.
Could be that I'm totally off the wall but I'm trying for a 'minimum
effort' viability hack :-))
Senior Design Engineer Phone: (+64)(3) 357 1569
Tait Electronics Fax : (+64)(3) 359 4632
PO Box 1645 Christchurch Email : robin.gilks at tait.co.nz
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