[PATCH 3/3] PPC440EP: MTD support for the Bamboo Board

[Wade Farnsworth]

On Wed, 2005-04-06 at 17:58, Josh Boyer wrote:
> On Wed, 2005-04-06 at 10:33 -0700, Wade Farnsworth wrote:
> 
> Cool beans.  Can't wait to test this out tomorrow.  Just a couple comments.
> 
> <snip>
> 
> > +struct ppc440ep_ndfc_regs {
> > +       uint cmd;
> > +       uint addr;
> > +       uint data;
> > +       uint reserved1;
> > +       uint ecc0;
> > +       uint ecc1;
> > +       uint ecc2;
> > +       uint ecc3;
> > +       uint ecc4;
> > +       uint ecc5;
> > +       uint ecc6;
> > +       uint ecc7;
> > +       uint b0cr;
> > +       uint b1cr;
> > +       uint b2cr;
> > +       uint b3cr;
> > +       uint cr;
> > +       uint sr;
> > +       uint hwctl;
> > +       uint reserved2;
> > +       uint revid;
> > +};
> 
> These ecc registers actually have a use...
> 
> <snip>
> 
> > +
> > +       /* Set address of NAND IO lines (Using Linear Data Access Region) */
> > +       this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > +       this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > +       /* Reference hardware control function */
> > +       this->hwcontrol  = bamboo_nand0_hwcontrol;
> > +       /* Set command delay time */
> > +       this->chip_delay = 12;
> > +       this->eccmode    = NAND_ECC_SOFT;
> > +       this->write_byte = bamboo_nand0_write_byte;
> > +       this->read_byte  = bamboo_nand0_read_byte;
> > +       this->write_buf  = bamboo_nand0_write_buf;
> > +       this->read_buf   = bamboo_nand0_read_buf;
> > +       this->verify_buf = bamboo_nand0_verify_buf;
> > +       this->dev_ready  = bamboo_dev_ready;
> 
> <snip>
> 
> > +       /* Link the private data with the MTD structure */
> > +       bamboo_nand1_mtd->priv = this;
> > +
> > +       /* Set address of NAND IO lines (Using Linear Data Access Region) */
> > +       this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > +       this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > +       /* Reference hardware control function */
> > +       this->hwcontrol  = bamboo_nand1_hwcontrol;
> > +       /* Set command delay time */
> > +       this->chip_delay = 25;
> > +       this->eccmode    = NAND_ECC_SOFT;
> > +       this->write_byte = bamboo_nand1_write_byte;
> > +       this->read_byte  = bamboo_nand1_read_byte;
> > +       this->write_buf  = bamboo_nand1_write_buf;
> > +       this->read_buf   = bamboo_nand1_read_buf;
> > +       this->verify_buf = bamboo_nand1_verify_buf;
> > +       this->dev_ready  = NULL;
> 
> ... so any reason why NAND_ECC_SOFT is used instead of making use of the
> ECC registers that come with the NDFC?

Mainly because I haven't looked at what it would take to get HW ECC
working yet.  I'll look at this when I have time, but until then at
least the NAND flashes are functional.

> 
> Overall, I think the patch looks good.  Care to send it to the MTD
> maintainers so it gets in their CVS tree?

Will do.

-Wade