8xx v2.6 TLB problems and suggested workaround
marcelo.tosatti at cyclades.com
Wed Apr 6 22:16:49 EST 2005
On Tue, Apr 05, 2005 at 11:51:42PM +0200, Joakim Tjernlund wrote:
> Hi Marcelo
> Reading your report it doesn't sound likely but I will ask anyway:
> Is it possible that the problem you are seeing isn't caused by the
> "famous" CPU bug mentioned here:
> The DTLB error handler needs DAR to be set correctly and since the
> dcbX instructions doesn't set DAR in either DTLB Miss nor DTLB Error you
> may end up trying to fix the wrong address.
First of all, thanks your care!
Well, I dont think the above issue is exactly what we're hitting because
DAR is correctly updated on our case with "dcbst".
The problem is that it is treated as a write operation, but shouldnt.
Maybe it is related to dcbst's inability to set DAR?
BTW, about the CPU15 bug fix, has there been any effort to port/merge
it in v2.6 ?
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