Help!

[soar.wu]

Sorry for forget the attached file

-----Original Message-----
From: soar.wu [mailto:soar.wu at utstar.com]
Sent: 2004年10月27日 11:49
To: linuxppc-embedded at ozlabs.org
Subject: RE: Help!




-----Original Message-----
From: soar.wu [mailto:soar.wu at utstar.com]
Sent: 2004年10月27日 11:48
To: Mark Chambers; linuxppc-embedded at ozlabs.org
Subject: RE: Help!



The attached file is the hpi_ul_memcpy_dsp2h() function.

Yes, the 'HPI' - are connected to a T.I. DSP, 6416 type.

About the HPI problem progress.
now we have the following resolve method:

1, If we use a temp variable to store the read out data, then store the data to SDRAM, it is OK, there is no hop.
     tmpReadRst = READ_UL_HPI_REG(UL_HPIDA_ADDR);
    *p_cur = tmpReadRst;
     p_cur++;

2, If we donot modify the source codes, but we use the optimization O3 to compile the source codes, it is OK.
	*p_cur = READ_UL_HPI_REG(UL_HPIDA_ADDR);
	p_cur++;

3, If we add a sync instruction to the source  codes, it is OK.
	*p_cur = READ_UL_HPI_REG(UL_HPIDA_ADDR);
            __asm__("  eieio; sync");
	p_cur++;

4, If we modify the BSP, update the memory operation option,
from :
PHYS_MEM_DESC sysPhysMemDesc [] =
{
...
    /*all the other small chip*/
    {
    (void *) 0x50000000,
    (void *) 0x50000000,
    0x08000000,     
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },
...
to:
PHYS_MEM_DESC sysPhysMemDesc [] =
{
...
    /*all the other small chip*/
    {
    (void *) 0x50000000,
    (void *) 0x50000000,
    0x08000000,     
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED
    },
...

We added the option VM_STATE_VM_MASK_GUARDED and VM_STATE_GUARDED,
still use the old source codes:
	*p_cur = READ_UL_HPI_REG(UL_HPIDA_ADDR);
	p_cur++;

Now We find there is no hop. It is OK


5, If we use the memory which is allocated by function cacheDmaMalloc(), 
the hop still exist, but the number of  hop is little than when we use malloc().

Do you tell me the reason??

Wait for your reply.

Best Regards,
Soar Wu

-----Original Message-----
From: Mark Chambers [mailto:markc at mail.com]
Sent: 2004年10月26日 22:13
To: soar.wu; linuxppc-embedded at ozlabs.org
Subject: Re: Help!


Clear Day>Firstly we will write data to the HPI,
>then read data from the HPI to the SDRAM(this SDRAM is connected with
60x-BUS).
>The last we will read the data from the SDRAM to compare the data which is
write >to HPI.

Can you show the entire source for hpi_ul_memcpy_dsp2h()?

Also, you say 'HPI' - are connected to a T.I. DSP?  Which one?

Mark Chambers
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