soar.wu soar.wu at
Tue Oct 26 10:57:01 EST 2004

Clear DayHi,

I am very sorry to disturb you.
I have a problem.

We use the powerPC chip, though it is not your IBM chip.
It is Motorola MPC8260.
We have the HPI to the local bus of the MPC8260.

Firstly we will write data to the HPI,
then read data from the HPI to the SDRAM(this SDRAM is connected with 60x-BUS).
The last we will read the data from the SDRAM to compare the data which is write to HPI.

But we find it is different, there is a hop.
After we read out the data from SDRAM, we find there is a change.
e.g. the data which is write to the HPI is ordered by 1,2,3,4,5,6,7,8. 
but the data which is read out from HPI and store to SDRAM is 1,2,3,4,6,7,8,..

Then I modify the source codes as the follows:
void hpi_ul_memcpy_dsp2h(void *dest,U32 src_dsp_memory_addr, U32 count)
for(i = 0; i < len ; i+=4)
0x9ee940 +0x074: li r0, 0x0 (0)
0x9ee944 +0x078: stw r0, 0x18(r31)
0x9ee948 +0x07c: lwz r0, 0x18(r31)
0x9ee94c +0x080: lwz r9, 0x1c(r31)
0x9ee950 +0x084: cmpl crf1, 0, r0, r9
0x9ee954 +0x088: bc 0xc, 0x4, hpi_ul_memcpy_dsp2h + 0x90
0x9ee958 +0x08c: b hpi_ul_memcpy_dsp2h + 0xcc
#if 0 /* the old source codes*/
#else /* the new source codes*/
0x9ee95c +0x090: lis r9, 0x5200 (20992)
0x9ee960 +0x094: ori r9, r9, 0x8
0x9ee964 +0x098: lwz r0, 0x0(r9)
0x9ee968 +0x09c: stw r0, 0x24(r31)
*p_cur = tmpReadRst;
0x9ee96c +0x0a0: lwz r9, 0x14(r31)
0x9ee970 +0x0a4: lwz r0, 0x24(r31)
0x9ee974 +0x0a8: stw r0, 0x0(r9)
0x9ee978 +0x0ac: lwz r9, 0x14(r31)
0x9ee97c +0x0b0: addi r0, r9, 0x4 (4)
0x9ee980 +0x0b4: or r9, r0, r0
0x9ee984 +0x0b8: stw r9, 0x14(r31)
We find the problem is disappeared.

But I donot know the reason.
I only know something, like the data which is loaded by loading instruction to register, 
is valid only when the instruction is excuted after 2-clock-cycle

Do you tell me the reason??

Wait for your reply. 
Best Regards,
Soar Wu

Node B, 3G Department
UTStarcom (China) Inc.
Email:soar.wu at

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