VirtexIIPro, caches

[Kerl, John]

Hi Emanuel,

Without the MMU on, please check the ICCI and DCCI registers.
These give 128 MB resolution.

With the MMU on, caching is on a per-page basis; check the
TLB_W and TLB_I flags of each TLB entry.

-----Original Message-----
From: owner-linuxppc-embedded at lists.linuxppc.org
[mailto:owner-linuxppc-embedded at lists.linuxppc.org]
Sent: Tuesday, May 04, 2004 8:41 AM
To: linuxppc-embedded at lists.linuxppc.org
Subject: VirtexIIPro, caches



Hi all,
is there an easy way to check if the caches are all enabled ?
I have some performance problems and I'm trying to figure out
where it is coming from ...

cheers & thanks


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