IBM 440GX, Ocotea...
mporter at kernel.crashing.org
Thu Mar 25 03:05:28 EST 2004
On Wed, Mar 24, 2004 at 02:21:38PM -0000, Neil Wilson wrote:
> > > Does this mean that the L2 cache is unusable on current
> > revisions of
> > > the chip? [That's why we would like to use this chip.]
> > Yes, we found problems with current chip revisions (A & B).
> > Ask your IBM contact for more information.
> Can you elaborate a bit on this please ?, we are considering using this
> processor but would need the cache.
> I have had a quick look at the 2 errata docs I found on the IBM web
> site but must be missing the bit this relate to.
I know if I elaborated the "issue" it would violate the NDA that
we (my employer) are covered under. I assume Eugene is in a similar
position. You really should talk to IBM, that's what mvista is forced
to tell its 440GX customers. :)
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