Exception handling on mpc8xx cores

[Robin Gilks]

Mark Chambers wrote:
> 
>>On Wed, 2004-12-08 at 05:15, Robin Gilks wrote:
>>
>>>Greetings
>>>
>>>Any Freescale lurkers out there?
>>>
>>>The mpc866 manual implies that if the internal core times out an 
>>>external Transfer Acknowledge bus signal (by exerting the internally 
>>>generated Transfer Error Acknowledge signal) an exception is generated.
>>>
>>>I've tried extending the external TA signal well beyond 2040 clock 
>>>cycles the maximum timeout allows and I see the busses start up again 
>>>(indicationg that they are no longer waiting) but I don't see anything 
>>>on TEA and I don't get an exception thrown.
>>>
>>>Any clues? Manual error?, silicon error?, my brain error?
>>
>>Did you enable the bus monitor in the SYPCR register?
>>
> 
> 
> You've also got to have ME set in MSR to get the exception.  For whatever 
> it's worth, I have an mpc852 design (part of 866 family) that uses external
> acknowledge and it works as advertised.  I've seen the acknowledger,
> a DSP, fail, and we get a machine check exception.  (I've never 
> looked at TEA, though).
> 
> Mark Chambers

Identical situation to mine (well nearly).

Using a 859T CPU, the HPI to a DSP is being investigated and in doing so 
we've been forcing the DSP to delay TA to the ppc to check that we get 
an exception but we don't :-((

ME is set in MSR, BME is set in SYPCR, hair gradually disappearing. 
Guess its more debugging...

-- 
Robin Gilks
Senior Design Engineer          Phone: (+64)(3) 357 1569
Tait Electronics                Fax  :  (+64)(3) 359 4632
PO Box 1645 Christchurch        Email : robin.gilks at tait.co.nz
New Zealand

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