8270 performance

Jean-Denis Boyer jdboyer at m5t.com
Tue Dec 9 08:11:30 EST 2003


> > I would expect the bogomips number
> > to be somewhere near the core clock
> > (like 8xx).
> Well, I think the numbers are pretty fair, assuming that the
> bogomips number
> reflect a certain amount of external memory accesses at 66
> MHz external bus
> clock.

It has more to do with pipelining!
Hopefully, there ain't any memory access during calibration...
(except, of course, when the instruction cache is disabled!)

I didn't look at the documentation, but the execution of a branch probably occurs later in the pipeline of a 8260 than for the 860. It probably looses one more cycle. The calibration relies on the execution speed of function __delay (arch/ppc/kernel/misc.S), which loops on a branch instruction 'bdnz'.

Fortunately, the number of bogomips will increase linearly with the core clock.
(These are approximations)

For 8260:
 200MHz => 66M bdnz per second => 133BogoMips
 266    => 88M                 => 176
 400    => 133M                => 266

For 860:
 50MHz => 25M bdnz per second => 50BogoMips

 Jean-Denis Boyer, Eng.
 M5T Centre d'Excellence en Télécoms Inc.
 4283 Garlock Street
 Sherbrooke (Québec)
 (819)829-3972 x241

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