interrupt handling in 7410+64260

Mark A. Greer mgreer at mvista.com
Thu Aug 28 03:22:07 EST 2003


ghannon at cspi.com wrote:

>>2. request_irq(77, ...)
>>   77 means bit 15 of GPP_INTERRUPT_CAUSE register.
>>
>>
>
>There is an offset of 64, try 79 vs 77 to get bit 15.
>
>
Yep, 79 sounds right, if its GPP 15.

Mark


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