Organisation of 4xx initialization code

[Tom Rini]

On Fri, Nov 16, 2001 at 09:07:05AM -0700, Mark Pilon wrote:
>

> some issues:
> - mem mapped and DCRs have moved around, been added or taken away when
>   going from the 405gp to pm.
>
> - functional differneces exist between the parts as well: one example
>   being the GP has 5 ethernet interrupts mapped into the UIC, while
>   the PM they're all rolled into 1 int.
>
> - there may be silicon errata which affect one processor which have
>   been worked out of another.
>
> - and the cards are different as well ...
>
> for ease of replicating this port when the next kernel comes along,
> I came down on the side of really isolating everything I'm adding:
> 1bm405pm.h instead of ibm405gp.h,

That's exactly how it should go too.  And did you add in a CONFIG_405PM?
405GP things _should_ be CONFIG_405GP'ed.  If not please post a patch
for them.

> my own board and architecture setup funcs in their own module ...
> my own head_ppc405pm.S ....

Were these actually needed?

> my 0.0002: an approach which isolates chip-specific funcs in a
> chip-specific module, same for board-specific.  this adds maintenance
> as the flavors for a given processor grow.  maybe there's a more clever
> way to do this w/o globbing up a few files w/ many ifdefs.

Which is sort-of where things are going, but haven't yet.  The sooner
you post your port the sooner I can think about things too and see what
needs to be seperated out more.

--
Tom Rini (TR1265)
http://gate.crashing.org/~trini/

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