dcache BUG()

[David Blythe]

Dan Malek wrote:
>
> David Blythe wrote:
>
> > ....  However, we
> > can only make it happen on our 405GP walnut board(s) and not our
> > prototype 405GP board(s) (they both have rev D processors).
>
> Oh, great :-).....Are there any obvious differences, like clock
> speed, memory type or configuration, etc.?

Yes, there are some differences.  Memory speed is slower at the moment
(board is still in bringup stage).  There are other subtle differences
as well.  I believe Brian also saw the bug on a non-walnut 405GP.  I was
kinda hoping it was specific to some hardware, but i don't see any
pattern.  It seems that the bug is very sensitive to timing, at least
from watching it seeminly disappear as Eli made small changes to the
atomic ops or related code, as well as Brian's comments about using the
non-inline form of the atomic ops.

>
> If someone gets a chance, would you give the FSM labs linuxppc_2_5
> sources a whirl before they disappear?  I don't expect it to be
> perfect, but it would sure be nice debugging something else for
> a change :-).

Should it run out of the box?  I can give it a try if you have some
confidence it should build and and run a shell on a walnut board.

	thanks
	david

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/