MPC823 Single-Buffer Burst Fly-By Mode
hgray at matrix-vision.de
Wed Jul 4 18:39:49 EST 2001
Has anyone had any success getting the "Single-Buffer Burst Fly-By Mode"
(UM 184.108.40.206.4) on the MPC823 to work?
I am using our own hardware which with a recent revision CPU
(XPC823EZT66B2) so I shouldn't need to download the IDMA microcode patch.
I want to be able to DMA image data from a peripheral (CMOS sensor + FPGA)
directly into main memory.
The parameter RAM organisation for Single-Buffer Burst Fly-By Mod is
different than that used for other IDMA modes so the example in the
Motorola Engineer's Toolbox doesn't help much.
I've followed the instructions in the user manual i.e....
1. Issued a STOP command to the CPCR and waited for the FLG flag to clear.
2. Setup DCMR in the parameter RAM (non-interlaced mode, others except
BAPR and BCR not needed ?)
3. Set EIE to 1 and DR1M in the RCCR appropriately.
4. Issued an INIT command to the CPCR and waited for the FLG flag to
5. Setup IDMR1 mask register to use the DONE bit and cleared it in IDSR1.
6. Setup BAPR and BCR in the parameter RAM.
7. Set DREQ1 bit to 1 in PCSO to enable IDMA.
(It seems that I buffer descriptors are not used and don't need to be
Nothing seems to happen. Nothing is transferred when *DREQ1 is asserted so
that the DONE bit in the IDSR1 status register never appears.
An interrupt-driven version without IDMA works already but I would like to
try out IDMA (even though it has got some bad press in this list before).
Any help would be appreciated.
Howard D. Gray
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