ppc405_enet problems

David Müller (ELSOFT AG) d.mueller at elsoft.ch
Tue Dec 11 18:51:33 EST 2001

It looks like the MII controller is not setting the error flag for the
first access (reading of PHYIR1 in find_phy(ppc405_phy.c)

Perhaps my work-around (see attached file) will help you too.

Felix Radensky wrote:

 > Hi,
 > I'm trying to run the latest linuxppc_2_4_devel kernel on
 > our custom 405GP based board. I get kernel panic when an
 > attempt is made to probe for ethernet controller phy:
 > Kernel panic: eth0: PHY id 0xfbc85c20 is not supported!
 > The phy is National Semiconductor DP83846AVHG.
 > It works fine with Monta Vista HHL 2.0 kernel.
 > What you think could be the problem ?
 > TIA.
 > Felix.

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