Problem with MSR_IR setting(Instruction Relocateable)

Hua Ji hji at
Wed Apr 25 03:26:23 EST 2001

 Hi, folks,

I met a issue very confusing. My target is the ppc405GP and I am writing my
propertiey OS.

In my codes, after I finished the TLB setting(and for safe, I also set up
the ICCE, DCCR  and DCWR), I enabled
the MSR_IR and MSR_DR so that the CPU will now work on the address
translation mode.

When I use JTAG for debugging, I am surprised to find this :

**Every time when I step a "bl fool" in assember level, or setp a source
line in c level, the MSR get changed and the MSR_IR
got **disabled**!!. However, the MSR_DR stay. I am very confusing. Why
changed my MSR??!!!:--(. This just suddently disabled
all my TLB mapping for instruction as well as the caching settings!!

Any hints are highly appreciated!


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