What is the catch with IDMA on MPC860?

Geir Frode Raanes geirfrs at invalid.ed.ntnu.no
Fri Mar 17 23:18:08 EST 2000

I must admit - I love DMA. A DMA a day keeps the
software away. But I repeatedly hear - both inhouse
and on this list that the MPC860 IDMA implementation
leaves somewhat to be wanted. Problem is, I can not
figure out what. MPC860 IDMA looks OK.

According to the documentation, the SDMA/IDMA (DSP-)
controller will perform a normal arbitration on the
internal U-bus and, when granted access, perform a
fast back-to-back transfer. In the IDMA case the
transfer will continue until exhaustion of the
(possibely chained) Buffer Descriptor (list.)
The SDMA will OTOH perform an alternating bus
cycle-steal transfer.

Dual address modes will even interface between
different bus sizes on source and target by grouping
data in the internal buffer memory, thus utilizing
the widest bus width possible on both read and write.

Revision C or later of the '860 will even perform
a single-address _burst_ transfer on IDMA channel 1.
This I would love to do from our in-house designed
frame grabber to main memory. Then I could avoid
disabling all interrupts while bursting. Meaning
I could still catch run-away situations on a
time-out basis. Today things simply lock up...

Sooo, what is really the problem with IDMA?


  Never ever underestimate the power of human stupidity.
  -Robert Anson Heinlein

		GeirFRS at invalid.and.so.forth

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