User buffers and cache flushing.

[Greg Johnson]

Hi All,

Following the other thread on USB. The driver I am writing for an
MPC855T embedded board, I create a character device that a user
can 'write (2)' to. I then need to DMA this data directly to our
device. I now realise that I will need to be calling
flush_dcache_range prior to kicking of the IDMA transfer. Since I
am not wanting to be double handling this data, and the data will
most likely be fragmented in memory, it looks like I will need to
resolve kernel addresses and sizes for each memory fragment of the
users data buffer (something like a scatter/gather list, I guess)
and call flush_dcache_range on each of these fragments.

Is this reasoning correct?
Have I overlooked anything? (other than the lack of support for IDMA
currently in the MPC8xx kernel)

Thanks.

Greg.

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