kernel crashes at InstructionTLBMiss

[Graham Stoney]

Dan Malek writes:
> I was just reminded of a patch to correct a mistake I made in this
> particular kernel.  It is attached.  Apply just this one to the
> MontaVista kernel :-).

I'd like to suggest the following patch as a more complete fix to avoid any
possible cmd_line corruption due to the CPU6 workaround.

Regards,
Graham

Index: arch/ppc/kernel/head.S
===================================================================
retrieving revision 1.1.1.3
diff -u -r1.1.1.3 head.S
--- arch/ppc/kernel/head.S	2000/03/10 01:11:12	1.1.1.3
+++ arch/ppc/kernel/head.S	2000/06/06 03:53:32
@@ -2286,15 +2286,15 @@
         lwz     r9,PGD(r9)              /* get new->mm->pgd */
         addis   r9,r9,-KERNELBASE at h     /* convert to phys addr */
 #ifdef CONFIG_8xx_CPU6
-	lis	r6, cmd_line at h
-	ori	r6, r6, cmd_line at l
+	lis	r6, cpu6_bug at h
+	ori	r6, r6, cpu6_bug at l
 	li	r7, 0x3980
-	stw	r7, 12(r6)
-	lwz	r7, 12(r6)
+	stw	r7, 0(r6)
+	lwz	r7, 0(r6)
         mtspr   M_TWB, r9               /* Update MMU base address */
 	li	r7, 0x3380
-	stw	r7, 12(r6)
-	lwz	r7, 12(r6)
+	stw	r7, 0(r6)
+	lwz	r7, 0(r6)
         mtspr   M_CASID, r5             /* Update context */
 #else
         mtspr   M_TWB, r9               /* Update MMU base address */
@@ -2432,11 +2432,11 @@
 	SYNC			/* Some chip revs need this... */
 	mtmsr	r6
 	SYNC
-	lis	r7, cmd_line at h
-	ori	r7, r7, cmd_line at l
+	lis	r7, cpu6_bug at h
+	ori	r7, r7, cpu6_bug at l
 	li	r4, 0x3980
-	stw	r4, 12(r7)
-	lwz	r4, 12(r7)
+	stw	r4, 0(r7)
+	lwz	r4, 0(r7)
         mtspr   M_TWB, r3               /* Update MMU base address */
 	SYNC
 	mtmsr	r5
@@ -2452,11 +2452,11 @@
 	SYNC			/* Some chip revs need this... */
 	mtmsr	r6
 	SYNC
-	lis	r7, cmd_line at h
-	ori	r7, r7, cmd_line at l
+	lis	r7, cpu6_bug at h
+	ori	r7, r7, cpu6_bug at l
 	li	r4, 0x2c00
-	stw	r4, 12(r7)
-	lwz	r4, 12(r7)
+	stw	r4, 0(r7)
+	lwz	r4, 0(r7)
         mtspr   22, r3		/* Update Decrementer */
 	SYNC
 	mtmsr	r5
@@ -2899,6 +2899,11 @@
 	.globl	cmd_line
 cmd_line:
 	.space	512
+
+#ifdef CONFIG_8xx_CPU6
+cpu6_bug:
+	.space 4
+#endif

 /*
  * An undocumented "feature" of 604e requires that the v bit


--
Graham Stoney
Principal Hardware/Software Engineer
Canon Information Systems Research Australia
Ph: +61 2 9805 2909  Fax: +61 2 9805 2929

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