[PATCH v2 3/4] powerpc64/bpf: Add support for indirect jump
Hari Bathini
hbathini at linux.ibm.com
Tue Mar 31 21:42:38 AEDT 2026
On 27/02/26 7:13 am, adubey at linux.ibm.com wrote:
> From: Abhishek Dubey <adubey at linux.ibm.com>
>
> Add support for a new instruction
>
> BPF_JMP|BPF_X|BPF_JA, SRC=0, DST=Rx, off=0, imm=0
>
> which does an indirect jump to a location stored in Rx. The
> register Rx should have type PTR_TO_INSN. This new type ensures
> that the Rx register contains a value (or a range of values)
> loaded from a correct jump table – map of type instruction array.
>
> Support indirect jump to all registers in powerpc64 JIT using
> the ctr register. Move Rx content to ctr register, then invoke
> bctr instruction to branch to address stored in ctr register.
> Skip save and restore of TOC as the jump is always within the
> program context.
>
Looks good to me.
Acked-by: Hari Bathini <hbathini at linux.ibm.com>
> Signed-off-by: Abhishek Dubey <adubey at linux.ibm.com>
> ---
> arch/powerpc/net/bpf_jit_comp64.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
> index c1d011046d8b..2cb550ca1dec 100644
> --- a/arch/powerpc/net/bpf_jit_comp64.c
> +++ b/arch/powerpc/net/bpf_jit_comp64.c
> @@ -1627,6 +1627,14 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
> addrs[++i] = ctx->idx * 4;
> break;
>
> + /*
> + * JUMP reg
> + */
> + case BPF_JMP | BPF_JA | BPF_X:
> + EMIT(PPC_RAW_MTCTR(dst_reg));
> + EMIT(PPC_RAW_BCTR());
> + break;
> +
> /*
> * Return/Exit
> */
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