[PATCH] powerpc: DTS: mpc8313erdb: Add timer@*/clock-frequency properties
J. Neuschäfer via B4 Relay
devnull+j.ne.posteo.net at kernel.org
Fri Jan 2 04:09:46 AEDT 2026
From: "J. Neuschäfer" <j.ne at posteo.net>
The recent formalization of the fsl,gtm schema has shown that
mpc8313erdb.dts doesn't provide the clock-frequency property on timer
nodes. A few different expectations collide here:
- Both the binding and the driver for the Freescale global timer module
(GTM) have always required clock-frequency, since their addition in
2008 (v2.6.26-rc5-236-g83ff9dcf375c41).
- mpc8313erdb.dts never had the timer@*/clock-frequency property, since
the timer nodes were added in 2008 (v2.6.26-3343-g574366128db29e)
I suspect the way this worked was that the bootloader filled these
values when booting on an MPC8313 board.
Reported-by: kernel test robot <lkp at intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202505300136.HOpO5P6y-lkp@intel.com/
Signed-off-by: J. Neuschäfer <j.ne at posteo.net>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 09508b4c8c7309..0bddc3be9e62f8 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -308,6 +308,7 @@ gtm1: timer at 500 {
reg = <0x500 0x100>;
interrupts = <90 8 78 8 84 8 72 8>;
interrupt-parent = <&ipic>;
+ clock-frequency = <0>; /* filled by bootloader */
};
timer at 600 {
@@ -315,6 +316,7 @@ timer at 600 {
reg = <0x600 0x100>;
interrupts = <91 8 79 8 85 8 73 8>;
interrupt-parent = <&ipic>;
+ clock-frequency = <0>; /* filled by bootloader */
};
};
---
base-commit: 9448598b22c50c8a5bb77a9103e2d49f134c9578
change-id: 20250625-timer-clock-e03fa9e835c8
Best regards,
--
J. Neuschäfer <j.ne at posteo.net>
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