[PATCH v6 15/16] PCI/AER: Add ratelimits to PCI AER Documentation
Bjorn Helgaas
helgaas at kernel.org
Wed May 21 05:48:41 AEST 2025
On Mon, May 19, 2025 at 10:01:09PM -0700, Sathyanarayanan Kuppuswamy wrote:
>
> On 5/19/25 2:35 PM, Bjorn Helgaas wrote:
> > From: Jon Pan-Doh <pandoh at google.com>
> >
> > Add ratelimits section for rationale and defaults.
> > +AER Ratelimits
> > +--------------
> > +
> > +Since error messages can be generated for each transaction, we may see
> > +large volumes of errors reported. To prevent spammy devices from flooding
> > +the console/stalling execution, messages are throttled by device and error
> > +type (correctable vs. uncorrectable).
>
> Can we list exceptions like DPC and FATAL errors (if added) ?
Like this?
+... messages are throttled by device and error
+type (correctable vs. non-fatal uncorrectable). Fatal errors, including
+DPC errors, are not ratelimited.
DPC is currently only triggered for fatal errors.
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