[PATCH 2/6] powerpc/xmon: fix sparse warning "Using plain integer as NULL pointer"

[Christophe Leroy]

Le 22/04/2025 à 15:10, Madhavan Srinivasan a écrit :
> Fix passing of argument 0 to NULL to avoid sparse warning

I thought we wanted to keep this file in sync with opcodes/ppc-opc.c in 
the binutils repository.

Are you sure you want to do such manual change ? Shouldn't the change 
first be done in binutils then backported in linux kernel ?

Christophe

> 
> Cleans up sparse warning:
> arch/powerpc/xmon/ppc-opc.c:797:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:797:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:801:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:801:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:805:14: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:805:17: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:809:16: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:809:19: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:863:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:863:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:868:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:868:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:872:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:872:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:875:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:875:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:878:15: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:878:18: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:881:14: warning: Using plain integer as NULL pointer
> arch/powerpc/xmon/ppc-opc.c:881:17: warning: Using plain integer as NULL pointer
> 
> Signed-off-by: Madhavan Srinivasan <maddy at linux.ibm.com>
> ---
>   arch/powerpc/xmon/ppc-opc.c | 20 ++++++++++----------
>   1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
> index 0774d711453e..b4ca7eb8d765 100644
> --- a/arch/powerpc/xmon/ppc-opc.c
> +++ b/arch/powerpc/xmon/ppc-opc.c
> @@ -794,19 +794,19 @@ const struct powerpc_operand powerpc_operands[] =
>   #define PSWM WS + 1
>     /* The BO16 field in a BD8 form instruction.  */
>   #define BO16 PSWM
> -  {  0x1, 10, 0, 0, 0 },
> +  {  0x1, 10, NULL, NULL, 0 },
>   
>     /* IDX bits for quantization in the pair singles instructions.  */
>   #define PSQ PSWM + 1
> -  {  0x7, 12, 0, 0, 0 },
> +  {  0x7, 12, NULL, NULL, 0 },
>   
>     /* IDX bits for quantization in the pair singles x-type instructions.  */
>   #define PSQM PSQ + 1
> -  {  0x7, 7, 0, 0, 0 },
> +  {  0x7, 7, NULL, NULL, 0 },
>   
>     /* Smaller D field for quantization in the pair singles instructions.  */
>   #define PSD PSQM + 1
> -  {  0xfff, 0, 0, 0,  PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
> +  {  0xfff, 0, NULL, NULL,  PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
>   
>     /* The L field in an mtmsrd or A form instruction or R or W in an X form.  */
>   #define A_L PSD + 1
> @@ -860,25 +860,25 @@ const struct powerpc_operand powerpc_operands[] =
>     /* Xilinx APU related masks and macros */
>   #define FCRT XFL_L + 1
>   #define FCRT_MASK (0x1f << 21)
> -  { 0x1f, 21, 0, 0, PPC_OPERAND_FCR },
> +  { 0x1f, 21, NULL, NULL, PPC_OPERAND_FCR },
>   
>     /* Xilinx FSL related masks and macros */
>   #define FSL FCRT + 1
>   #define FSL_MASK (0x1f << 11)
> -  { 0x1f, 11, 0, 0, PPC_OPERAND_FSL },
> +  { 0x1f, 11, NULL, NULL, PPC_OPERAND_FSL },
>   
>     /* Xilinx UDI related masks and macros */
>   #define URT FSL + 1
> -  { 0x1f, 21, 0, 0, PPC_OPERAND_UDI },
> +  { 0x1f, 21, NULL, NULL, PPC_OPERAND_UDI },
>   
>   #define URA URT + 1
> -  { 0x1f, 16, 0, 0, PPC_OPERAND_UDI },
> +  { 0x1f, 16, NULL, NULL, PPC_OPERAND_UDI },
>   
>   #define URB URA + 1
> -  { 0x1f, 11, 0, 0, PPC_OPERAND_UDI },
> +  { 0x1f, 11, NULL, NULL, PPC_OPERAND_UDI },
>   
>   #define URC URB + 1
> -  { 0x1f, 6, 0, 0, PPC_OPERAND_UDI },
> +  { 0x1f, 6, NULL, NULL, PPC_OPERAND_UDI },
>   
>     /* The VLESIMM field in a D form instruction.  */
>   #define VLESIMM URC + 1