[PATCH 5/5] powerpc/microwatt: Add SMP support

Paul Mackerras paulus at ozlabs.org
Fri Jan 31 12:34:14 AEDT 2025


On Wed, Jan 29, 2025 at 11:50:44PM +1100, Michael Ellerman wrote:
> Paul Mackerras <paulus at ozlabs.org> writes:

> There's macros that would make these a little nicer, ie. PPC_RAW_MFSPR()
> and PPC_RAW_BRANCH().

Thanks, I'll use them.

> > 	/* enable the other CPUs, they start at location 0 */
> > 	writel((1ul << ncpus) - 1, syscon + SYSCON_CPU_CTRL);
> >
> > 	timeout = 10000;
> > 	while (!__secondary_hold_acknowledge) {
> > 		if (--timeout == 0)
> > 			break;
> > 		barrier();
> > 	}
> 
> I assume CPU 0 always boots first?

Yes, on reset, only CPU 0 starts executing, and the rest are held in
the reset state until that writel() to SYSCON_CPU_CTRL enables them.
They all then start executing at location 0.

> Is the loop actually necessary? It only waits for a single non-zero CPU
> to come up after all, not all of them.

Yes, it only waits for the first one to get to the point of setting
__secondary_hold_acknowledge, but that might take a microsecond or so,
meaning we do need a loop (or I suppose a udelay(10) would probably
also be sufficient).  The assumption is that any others will get into
the loop very shortly after the first.  If that proves incorrect, it
would be possible instead to start them one by one, clearing
__secondary_hold_acknowledge each time (but I don't have a way to test
such code at present).

Paul.


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